TMS320F28375DPZP datasheet(121/226 Pages) TI

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8.10.3 Buffered Digital-to-Analog Converter (DAC)

The buffered DAC module consists of an internal 12-bit DAC and an analog output buffer that is capable of

driving an external load. An integrated pulldown resistor on the DAC output helps to provide a known pin voltage

when the output buffer is disabled. This pulldown resistor cannot be disabled and remains as a passive

component on the pin, even for other shared pin mux functions. Software writes to the DAC value register can

take effect immediately or can be synchronized with EPWMSYNCPER events.

Each buffered DAC has the following features:

• 12-bit programmable internal DAC

• Selectable reference voltage

• Pulldown resistor on output

• Ability to synchronize with EPWMSYNCPER

The block diagram for the buffered DAC is shown in Figure 8-44.

EPWM1SYNCPER

VREFHI

VDDA

VSSA

VDAC

DACCTL[DACREFSEL]

DACCTL[LOADMODE]

SYSCLK

DACCTL[SYNCSEL]

EPWM2SYNCPER

EPWM3SYNCPER

EPWMnSYNCPER

...

DACVALS

n-1

DACVALA

Buffer

12-bit

DAC

VSSA

DACOUT

DACREF

RPD

Figure 8-44. DAC Module Block Diagram

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TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D

TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021

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TMS320F28377D-Q1 TMS320F28376D TMS320F28375D TMS320F28374D

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