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A6986I bảng dữ liệu(PDF) 36 Page - STMicroelectronics |
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A6986I bảng dữ liệu(HTML) 36 Page - STMicroelectronics |
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36 / 62 page ![]() 7.5 Design of the external components 7.5.1 Input capacitor selection The input capacitor, just like in a standard buck, should limit the input voltage ripple. Key parameters of the input capacitor are, together with its value, the maximum operating voltage and the RMS current capability. The input capacitor voltage rating must be higher than the maximum input operating voltage of the application. During the switching activity a pulsed current flows into the input capacitor and so its RMS current capability must be selected according to the application conditions. Internal losses of the input filter depend on the ESR value so usually low ESR capacitors (like multilayer ceramic capacitors) have higher RMS current capability. On the other hand, given the RMS current value, a lower ESR input filter has lower losses and so contributes to higher conversion efficiency. The maximum RMS input current flowing through the capacitor can be calculated as: IRMS=IOUT_pri+IOUT_secN∙ 1‐Dη∙Dη (30) In the ideal case of efficiency η = 1, the RMS current reaches its maximum value when D = 0.5. In general, the maximum and minimum duty cycles can be calculated as: DMAX= VOUT_pri+ΔVLS VINmin+ΔVLS−ΔVHS (31) DMIN= VOUT_pri + ΔVLS VINmax+ΔVLS−ΔVHS (32) where ΔVHS and ΔVLS are the voltage drop across the high-side and low-side MOSFETs respectively. The AC component of the input current (see Figure 41) flows in the input capacitor, generating the input voltage ripple. Figure 42. Input capacitor AC current The peak-to-peak voltage across the input capacitor can be calculated as follows: VPP= IOUT_pri+IOUT_sec∙NsecNpri CIN∙fSW ∙Dη∙1−Dη +ESR∙IOUT_pri+IOUT_sec+∆IL2 (33) In the case of negligible ESR (e.g. in case of MLCC capacitors) equation (33) can be simplified. The value of the input capacitor can be then derived: CIN = IOUT_pri+IOUT_sec∙NsecNpri VPP∙fSW ∙Dη∙1−Dη (34) Considering the ideal case of η = 1, the equation above reaches its maximum value when D = 0.5. Therefore, the minimum input capacitance value can be defined as follows: A6986I Design of the external components DS13481 - Rev 2 page 36/62 |
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