A6986I datasheet(33/62 Pages) STMICROELECTRONICS

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Figure 37. Two regulators not synchronized

The figure below shows the same regulators working synchronized having the SYNCH pins connected. The

MASTER regulator (LX_reg2 trace) delivers the synchronization signal to the slave device (LX_reg1). The SLAVE

regulator works in phase with the synchronization signal, which is out of phase with the master switching

operation.

Figure 38. Two regulators not synchronized

7.4.2

External synchronization signal

Multiple A6986I can be synchronized to an external frequency signal fed to the SYNCH pin. In this case the

regulator set is phased to the reference and all the devices work with 0° phase shift.

Considering that the minimum synchronization pulse width coincides with the TON MIN (typ. 340 ns), it is

recommended to synchronize with a frequency not higher than 1 MHz.

Since the internal slope compensation contribution that is required to prevent subharmonic oscillations in peak

current mode architecture depends on the oscillator frequency, it is important to select the same oscillator

frequency for all regulators (all of them operate as slave) as close as possible to the frequency of the reference

signal (please refer to Table 6). As a consequence, all the regulators have the same resistor value connected

to the FSW pin, so the slope compensation is optimized accordingly with the frequency of the synchronization

signal. The slope compensation contribution is latched at power-up and so fixed during the device operation.

A6986I

Synchronization

DS13481 - Rev 2

page 33/62

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