PRT2011CVL5A datasheet(85/112 Pages) NXP

85 / 112 page

Boot mode configuration

i.MX RT1064 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 08/2020

NXP Semiconductors

GPIO_SD_B1_10

flexspi.A_DATA[2]

ALT 1

—

GPIO_SD_B1_11

flexspi.A_DATA[3]

ALT 1

—

Table 76. Boot through SD1

PAD Name

IO Function

Mux Mode

Comments

GPIO_SD_B0_00

usdhc1.CMD

ALT 0

—

GPIO_SD_B0_01

usdhc1.CLK

ALT 0

—

GPIO_SD_B0_02

usdhc1.DATA0

ALT 0

—

GPIO_SD_B0_03

usdhc1.DATA1

ALT 0

—

GPIO_SD_B0_04

usdhc1.DATA2

ALT 0

—

GPIO_SD_B0_05

usdhc1.DATA3

ALT 0

—

Table 77. Boot through SD2

PAD Name

IO Function

Mux Mode

Comments

GPIO_SD_B1_00

usdhc2.DATA3

ALT 0

—

GPIO_SD_B1_01

usdhc2.DATA2

ALT 0

—

GPIO_SD_B1_02

usdhc2.DATA1

ALT 0

—

GPIO_SD_B1_03

usdhc2.DATA0

ALT 0

—

GPIO_SD_B1_04

usdhc2.CLK

ALT 0

—

GPIO_SD_B1_05

usdhc2.CMD

ALT 0

—

GPIO_SD_B1_06

usdhc2.RESET_B

ALT 0

—

GPIO_SD_B1_08

usdhc2.DATA4

ALT 0

—

GPIO_SD_B1_09

usdhc2.DATA5

ALT 0

—

GPIO_SD_B1_10

usdhc2.DATA6

ALT 0

—

GPIO_SD_B1_11

usdhc2.DATA7

ALT 0

—

Table 78. Boot through SPI-1

PAD Name

IO Function

Mux Mode

Comments

GPIO_SD_B0_00

lpspi1.SCK

ALT 4

—

GPIO_SD_B0_02

lpspi1.SDO

ALT 4

—

GPIO_SD_B0_03

lpspi1.SDI

ALT 4

—

GPIO_SD_B0_01

lpspi1.PCS0

ALT 4

—

Table 75. Boot through FlexSPI (continued)

PAD Name

IO Function

Mux Mode

Comments

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