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PRT2011CVL5A bảng dữ liệu(PDF) 3 Page - NXP Semiconductors |
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PRT2011CVL5A bảng dữ liệu(HTML) 3 Page - NXP Semiconductors |
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3 / 112 page ![]() i.MX RT1064 Introduction i.MX RT1064 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 08/2020 NXP Semiconductors 3 — Four Periodical Interrupt Timers (PIT) – Generic 32-bit resolution timer – Periodical interrupt generation — Four Quad Timers (QTimer) – 4-channel generic 16-bit resolution timer for each – Each support standard capture and compare operation – Quadrature decoder integrated — Four FlexPWMs – Up to 8 individual PWM channels per each – 16-bit resolution PWM suitable for Motor Control applications — Four Quadrature Encoder/Decoders Each i.MX RT1064 processor enables the following interfaces to external devices (some of them are muxed and not available simultaneously): • Display Interface: — Parallel RGB LCD interface – Support 8/16/24 bit interface – Support up to WXGA resolution – Support Index color with 256 entry x 24 bit color LUT – Smart LCD display with 8/16-bit MPU/8080 interface • Audio: — S/PDIF input and output — Three synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and codec/DSP interfaces — MQS interface for medium quality audio via GPIO pads • Generic 2D graphics engine: — BitBlit — Flexible image composition options—alpha, chroma key — Porter-duff blending — Image rotation (90, 180, 270) — Image size — Color space conversion — Multiple pixel format support (RGB, YUV444, YUV422, YUV420, YUV400) — Standard 2D-DMA operation • Camera sensors: — Support 24-bit, 16-bit, and 8-bit CSI input • Connectivity: — Two USB 2.0 HS OTG controllers with integrated PHY interfaces |
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