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FXLS8964AF bảng dữ liệu(PDF) 53 Page - NXP Semiconductors

tên linh kiện FXLS8964AF
Giải thích chi tiết về linh kiện  3-Axis Low-g Accelerometer
PDF  98 Pages
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FXLS8964AF bảng dữ liệu(HTML) 53 Page - NXP Semiconductors

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NXP Semiconductors
FXLS8964AF
3-Axis Low-g Accelerometer
FXLS8964AF
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Objective data sheet
Rev. 2 — 30 October 2020
53 / 98
After this initial delay, all subsequent data samples are made available at the ODR rate.
For all other operating modes and settings the first sample is produced within 1 ODR
period.
Notes:
• When the device transitions from WAKE to SLEEP or from SLEEP to WAKE modes
there is a 500 µs (nominal) delay between the last acquisition at the WAKE/SLEEP
mode ODR and the first acquisition at the SLEEP/WAKE mode ODR.
• The ODR may only be changed in Standby mode, with SENS_CONFIG1[ACTIVE] = 0
and
SENS_CONFIG4[INT2_FUNC] = 0.
Table 51. WAKE and SLEEP Low Power mode ODR and decimation settings
ODR[3]
ODR[2]
ODR[1]
ODR[0]
ODR
Selection
(Hz)
Decimation
selection
(samples)
Noise RMS (mg)[1][2]
IDD
(µA)
0
0
0
0
3200
1
12.39
150
0
0
0
1
1600
1
11.77
75
0
0
1
0
800
1
11.19
38
0
0
1
1
400
1
10.91
20
0
1
0
0
200
1
10.71
11
0
1
0
1
100
1
10.63
5.3
0
1
1
0
50
1
10.71
3.1
0
1
1
1
25
1
10.66
1.8
1
0
0
0
12.5
1
10.65
1.4
1
0
0
1
6.25
1
10.69
1.0
1
0
1
0
3.125
1
10.77
0.80
1
0
1
1
1.563
1
10.63
0.70
1
1
0
0
0.781
1
10.57
0.65
1
1
0
1
0.781
1
10.57
0.65
1
1
1
0
0.781
1
10.57
0.65
1
1
1
1
0.781
1
10.57
0.65
[1]
Values are for ±2 g FSR only.
[2]
Based on post board mount characterization data. Tested on a mechanically isolated granite table to provide isolation from environmental vibration.
Table 52. WAKE and SLEEP High Performance mode ODR and decimation settings
ODR[3]
ODR[2]
ODR[1]
ODR[0]
ODR
selection
(Hz)
Decimation
selection
(samples)
Noise RMS (mg)[1][2]
IDD
(µA)
0
0
0
0
3200
1
12.51
150
0
0
0
1
1600
2
8.57
150
0
0
1
0
800
4
5.79
150
0
0
1
1
400
8
4.00
150
0
1
0
0
200
16
2.80
150



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