NTP53X2 datasheet(102/133 Pages) NXP

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NXP Semiconductors

NTP53x2

NTAG 5 link - NFC Forum-compliant I2C bridge

NTP53x2

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3.3 — 3 July 2020

COMPANY PUBLIC

544533

102 / 133

NOTE: If WDT_CONFIG configured time elapses before ongoing I2C communication is

finished, WDT will release SDA line in between of ongoing I2C communication.

The timer is reset automatically, when I2C_IF_LOCKED gets cleared, or the IC is not VCC

powered.

In I2C master use case, watchdog timer is always enabled independently of

WDT_ENABLE. It is important to set WDT_CONFIG in accordance with maximum

execution time.

8.3.1.4 Command Set

NTAG 5 link offers an easy to use I2C command set.

• WRITE MEMORY and READ MEMORY to access user and configuration memory

• WRITE MEMORY to present the related password, when password authentication from

I2C perspective is enabled

• WRITE REGISTER and READ REGISTER to access session registers

In Figure 10 the access to EEPROM with READ MEMORY and WRITE MEMORY is

illustrated and following symbols are used:

• START: I2C Start condition as defined in Section 8.3.1.1.1.

• SL_AD: 7-bit slave address (msb aligned) plus (lsb) R/W bit as defined in

Section 8.3.1.1.5

• BL_AD1 (MSB) / BL_AD0 (LSB): 16-bit block address

• A/N: Acknowledge / NAK as defined in Section 8.3.1.1.3

• DATA 0, DATA 1, … , DATA N: Data bytes to be read or written.

N shall be 3 for writing to EEPROM

N shall be multiple of 4 reduced by 1; maximum 255 for writing to SRAM

N is any number for reading data. NTAG 5 link will respond until host's NACK.

• Stop: Stop condition as defined in Section 8.3.1.1.2

aaa-035477

Read Data

HOST

START SL_AD

BL_AD1

SLAVE

Write Data

HOST

SLAVE

START SL_AD W

BL_AD0

SL_AD R

STOP

BL_AD1

BL_AD0

DATA 0

DATA 1

DATA 2

DATA 3

STOP

START

DATA 0

DATA 1

DATA 2

DATA N

STOP

A/N

Figure 10. READ MEMORY and WRITE MEMORY command

In Figure 11 the access to Registers with READ REGISTER and WRITE REGISTER is

illustrated and following symbols are used:

• START: I2C Start conditions as defined in Section 8.3.1.1.1.

• SL_AD: 7-bit slave address (msb aligned) plus (lsb) R/W bit as defined in

Section 8.3.1.1.5

• BL_AD1 (MSB) | BL_AD0 (LSB): 16-bit register block address

• REGA: 8-bit register address

• MASK: 8-bit control register bit mask. Only if corresponding control bit is set to 1b, the

• A/N: Acknowledge / Not Acknowledge as defined in Section 8.3.1.1.3

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