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NTP53X2 bảng dữ liệu(PDF) 37 Page - NXP Semiconductors

tên linh kiện NTP53X2
Giải thích chi tiết về linh kiện  NTAG 5 link - NFC Forum-compliant I2C bridge
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nhà sản xuất  NXP [NXP Semiconductors]
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NTP53X2 bảng dữ liệu(HTML) 37 Page - NXP Semiconductors

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NXP Semiconductors
NTP53x2
NTAG 5 link - NFC Forum-compliant I2C bridge
NTP53x2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 3.3 — 3 July 2020
COMPANY PUBLIC
544533
37 / 133
Bit
Name
Value
Description
011b
>2.7 mA
100b
>4.0 mA
5
101b
>6.5 mA
110b
>9.0 mA
4
111b
>12.5 mA
0b
Only if sufficient power can be harvested, VOUT
will be enabled (default)
3
DISABLE_
POWER_CHECK
1b
Power level will not be checked, VOUT will be
enabled immediately after startup
00b
1.8 V (Default)
2
01b
2.4 V
10b
3 V
1
EH_VOUT_V_SEL
11b
RFU
0b
Energy harvesting disabled (default)
0
EH_ENABLE
1b
Energy harvesting enabled
8.1.3.19 Event detection pin configuration settings
Event detection and field detection functionality define the behavior of the active low ED
pin depending on various events. As this pin is an open-drain active low implementation,
ED pin state ON means that signal is LOW and OFF means that signal is HIGH. More
details can be found in ED section (see Section 8.3.2).
Table 54. Event Detection Configuration Location (ED_CONFIG)
Block Address
NFC
I2C
Byte 0
Byte 1
Byte 2
Byte 3
3Dh
103Dh
EH_CONFIG
RFU
ED_CONFIG
RFU
Table 55. Event Detection Configuration Register Location (ED_CONFIG_REG)
Block Address
NFC
I2C
Byte 0
Byte 1
Byte 2
Byte 3
A8h
10A8h ED_COFIG_REG
RFU
Table 56. Event Detection Definition (ED_CONFIG and ED_CONFIG_REG)
Bit
Name
Value
ED pin
state
Description
7 to 4
RFU
0000b
N/A
Disable ED
0000b
OFF
Event detection pin disabled (default)
ON
NFC field present
3 to 0
NFC Field detect
0001b
OFF
NFC field absent



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