PIFE32251B-R47MS datasheet(74/96 Pages) TI1

74 / 96 page

Controller

DRVHx

DRVLx

BOOT1

SWx

FBVOUTx

(1)

PGNDSNSx

VOUT

VSYS

LOUT

ILIMx

DRV5V_x_x

LDO5V

Control

from SOC

PowerPAD

COUT

RILIM

TPS65094

SWCS133C – SEPTEMBER 2015 – REVISED FEBRUARY 2019

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Product Folder Links: TPS65094

Application and Implementation

7.2.1

Design Requirements

The TPS65094x device requires decoupling capacitors on the supply pins. Follow the values for

recommended capacitance on these supplies given in the Specifications section. The controllers,

converter, LDOs, and some other features can be adjusted to meet specific application requirements.

Section 7.2.2, Detailed Design Procedure, describes how to design and adjust the external components to

achieve desired performance.

7.2.2

Detailed Design Procedure

7.2.2.1

Controller Design Procedure

Designing the controller can be divided into the following steps:

1. Design the output filter.

2. Select the FETs.

3. Select the bootstrap capacitor.

4. Select the input capacitors.

5. Set the current limits.

Figure 7-2 shows a diagram of the controller. Controllers BUCK1, BUCK2, and BUCK6 require a 5-V

supply and capacitors at their corresponding DRV5V_x_x pins. For most applications, the DRV5V_x_x

input must come from the LDO5P0 pin to ensure uninterrupted supply voltage; a 2.2-µF, X5R, 20%, 10-V,

or similar capacitor must be used for decoupling.

Figure 7-2. Controller Diagram

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