PIFE32251B-R47MS datasheet(35/96 Pages) TI1

35 / 96 page

PGOOD

DCHG

SWx

NOC

XCON

DRVLx

PWM

Control Logic

VSYS

GND

REF

One-Shot

50 µA

BOOTx

DRVHx

FAULT

PGOOD

ILIM

VFB

SS Ramp Comp

VDD

DRV5V_x_x

PGNDSNSx

VREF ± VTH_PG

Ramp Generator

PMIC Internal Signals

External Inputs/Outputs

VREF + VTH_PG

TPS65094

www.ti.com

SWCS133C – SEPTEMBER 2015 – REVISED FEBRUARY 2019

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Detailed Description

6.3.3.1

Controller Overview

The controllers are fast-reacting, high-frequency, scalable output power controllers capable of driving two

external N-MOSFETs. They use a D-CAP2 control scheme that optimizes transient responses at high load

currents for such applications as CORE and DDR supplies. The output voltage is compared with internal

reference voltage after divider resistors. The PWM comparator determines the timing to turn on the high-

side MOSFET. The PWM comparator response maintains a very small PWM output ripple voltage.

Because the device does not have a dedicated oscillator for control loop on board, switching cycle is

controlled by the adaptive ON time circuit. The ON time is controlled to meet the target switching

frequency by feed-forwarding the input and output voltage into the ON time one-shot timer.

The D-CAP2 control scheme has an injected ripple from the SW node that is added to the reference

voltage to simulate output ripple, which eliminates the need for ESR-induced output ripple from D-CAP™

mode control. Thus, low-ESR output capacitors (such as low-cost ceramic MLCC capacitors) can be used

with the controllers.

Figure 6-3. Controller Block Diagram

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