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DSP56857 bảng dữ liệu(PDF) 584 Page - Freescale Semiconductor, Inc

tên linh kiện DSP56857
Giải thích chi tiết về linh kiện  Digitial Signal Controller
PDF  662 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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DSP56857 bảng dữ liệu(HTML) 584 Page - Freescale Semiconductor, Inc

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Application:
Date:
Programmer:
Sheet
Appendix B - Programmer’s Sheets, Rev. 4
Freescale Semiconductor
B-82
Preliminary
15 of 16
15 - 0
TSMA
Transmit Slot Mask A
This is a read/write register. In the Network mode, these registers are used by the transmitter
to determine which action to take in the current transmission slot. Depending on the setting of
the bits, the transmitter either tri-states the transmitter data signal or transmits a data word and
generates the appropriate transmit status. TSMA and TSMB can be viewed as a single 32-bit
register named TSM. Bit n in TSM (TSMn) is an enable/disable control bit for transmission in
slot N.
0
The transmit data signal of the transmitter is tri-stated during transmit time slot N. Data
is not transferred to the TXSR, therefore transmit status flags are not changed
1
The transmit sequence proceeds normally. Data is transferred from the STX register
(or TXFIFO, if enabled) to the shift register during slot N. Appropriate flags are set
16 - 31
TSMB
Transmit Slot Mask B
This is a read/write register. In the Network mode, these registers are used by the transmitter
to determine which action to take in the current transmission slot. Depending on the setting of
the bits, the transmitter either tri-states the transmitter data signal or transmits a data word and
generates the appropriate transmit status. TSMA and TSMB can be viewed as a single 32-bit
register.
0
The transmit data signal of the transmitter is tri-stated during transmit time slot N. Data
is not transferred to the TXSR, therefore transmit status flags are not changed
1
The transmit sequence proceeds normally. Data is transferred from the STX register
(or TXFIFO, if enabled) to the shift register during slot N. Appropriate flags are set
ESSI Transmit Slot Mask Registers (TSMA, TSMB)
ESSI
ESSI Transmit Slot
Mask Register
(TSMB)
Base + $D
Bits
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
TSMB [31:16]
Write
Reset
1111
1111
1111
1111
ESSI Transmit Slot
Mask Register
(TSMA)
Base + $C
Bits
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
TSMA [15:0]
Write
Reset
11111
1111
1111
111



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