DSP56857 datasheet(493/662 Pages) FREESCALE

493 / 662 page

Appendix - A Glossary, Rev. 4

Freescale Semiconductor

A-7

FPINx

FAULTx Pin

FREF

Reference Frequency

FTACKx

FAULTx Pin Acknowledge

GPIO

General Purpose Input/Output

GPR

Group Priority Register

Harvard

A microprocessor architecture using separate buses for program and data. This is

Architecture

data is typically used on DSPs to optimise the data throughput.

HACK

Host Acknowledge Input Pin

HBO

Hardware Breakpoint Occurrence

Host Command Bit

HCIE

Host Command Interrupt Enable Bit

HCP

Host Command Pending Bit

HCR

Host Interface Control Register

HDDS

Host Dual Data Strobe Bit

HDMA

Host DMA Status Bit

HF0

Host Flag 0 Bit (general-purpose flag)

HF1

Host Flag 1 Bit (general-purpose flag)

HF2

Host Flag 2 Bit (general-purpose flag)

HF3

Host Flag 3 Bit (general-purpose flag)

HLEND

Host Little Endian Bit

HLMTI

High Limit Interrupt Bit

HLMTIE

High Limit Interrupt Enable Bit

HM0

Host Mode Control 0 Bit

HM1

Host Mode Control 1 Bit

HOLD

Hold Register

HOME

Home Switch Input

HRDF

Host Status Receive Data Full Bit

HREQ

Host Request Output Bit

HRIE

Host Receive Interrupt Enable Bit

HRMS

Host Request Mode Select Bit

HRRQ

Host Receive Request Bit

HRX

Host Interface Data Register

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