ISL6752DBEVAL1Z datasheet(11/18 Pages) RENESAS

11 / 18 page

ISL6752

FN9181 Rev 4.00

Page 11 of 18

August 1, 2016

Implementing Soft-Start

The ISL6752 does not have a soft-start feature. Soft-start can

be implemented externally using the components shown in

Figure 5. The RC network governs the rate of rise of the

transistor’s base, which clamps the voltage at VERR.

The values of R and C should be selected to control the rate of

rise of VERR to the desired soft-start duration. The soft-start

duration may be calculated from Equation 6.

Where VSS is the soft-start clamp voltage, Vbe is the base

emitter voltage drop of the transistor, and

 is the DC gain of

the transistor. If

 is sufficiently large, that term may be

ignored. The Schottky diode discharges the soft-start capacitor

so that the circuit may be reset quickly.

Gate Drive

The ISL6752 outputs are capable of sourcing and sinking

10mA (at rated VOH, VOL) and are intended to be used in

conjunction with integrated FET drivers or discrete bipolar

totem pole drivers. The typical ON-resistance of the outputs is

50Ω.

Overcurrent Operation

The cycle-by-cycle peak current control results in

pulse-by-pulse duty cycle reduction when the current feedback

signal exceeds 1.0V. When the peak current exceeds the

threshold, the active output pulse is immediately terminated.

This results in a well controlled decrease in output voltage as

the load current increases beyond the current limit threshold.

The ISL6752 will operate continuously in an overcurrent

condition.

The propagation delay from CS exceeding the current limit

threshold to the termination of the output pulse is increased by

the Leading Edge Blanking (LEB) interval. The effective delay is

the sum of the two delays and is nominally 105ns.

Slope Compensation

Peak current-mode control requires slope compensation to

improve noise immunity, particularly at lighter loads, and to

prevent current loop instability, particularly for duty cycles

greater than 50%. Slope compensation may be accomplished

by summing an external ramp with the current feedback signal

or by subtracting the external ramp from the voltage feedback

error signal. Adding the external ramp to the current feedback

signal is the more popular method.

From the small signal current-mode model [1] it can be shown

that the naturally-sampled modulator gain, Fm, without slope

compensation, is expressed in Equation 7:

Where Sn is the slope of the sawtooth signal and tSW is the

duration of the half-cycle. When an external ramp is added, the

modulator gain becomes Equation 8:

Where Se is slope of the external ramp and:

The criteria for determining the correct amount of external

ramp can be determined by appropriately setting the damping

factor of the double-pole located at half the oscillator

frequency. The double-pole will be critically damped if the

Q-factor is set to 1, and over-damped for Q > 1, and

under-damped for Q < 1. An under-damped condition can

result in current loop instability.

Where D is the percent of on-time during a half cycle. Setting

Q = 1 and solving for Se yields in Equation 11:

Since Sn and Se are the on-time slopes of the current ramp

and the external ramp, respectively, they can be multiplied by

tON to obtain the voltage change that occurs during tON.

Where Vn is the change in the current feedback signal during

the on-time and Ve is the voltage that must be added by the

external ramp.

Vn can be solved for in terms of input voltage, current

transducer components, and output inductance yielding in

Equation 13:

FIGURE 8. IMPLEMENTING SOFT-START

VREF

ISL6752

VERR

tRC

–

VSS Vbe

–

VREF

0.001R



-------------------

-------------------------------------------

–









(EQ. 6)

SntSW

------------------

(EQ. 7)

Sn Se

t

------------------------------------

mcSntSW

--------------------------

(EQ. 8)

-------

(EQ. 9)

 m

c 1D

–

 0.5

–



-------------------------------------------------

(EQ. 10)



--- 0.5



 1

–

------------- 1

–





(EQ. 11)



--- 0.5



 1

–

------------- 1

–





(EQ. 12)

tSW V



RCS



NCT LO



----------------------------------------

--------





--- D0.5

–





(EQ. 13)

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