HT85F2240 datasheet(83/147 Pages) HOLTEK

83 / 147 page

Rev. 1.10

8� of 147

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A/D Flash 8051 Core Low Pin Count MCU

HT85F2230/HT85F2240

T2CON Register

SFR Address: C8h

Bit

Name

—

I�FR

—

T�R1

T�R0

T�CM

T�I1

T�I0

R/W

—

R/W

—

R/W

POR

—

Bit 7

Unimplemented, read as “0”

Bit 6

I3FR: Timer 2 capture mode 0 edge selection for “CC0”

0: Falling edge

1: Rising edge

This bit is used as capture signal in CC0. When Timer 2 is selected as compare

mode 0, for compare interrupt flag active high timing consideration, the I3FR bit is

recommended to be set high by firmware.

Bit 5

Unimplemented, read as “0”

Bit 4~3

T2R1, T2R0: Timer 2 reload mode selection

Described elsewhere

Bit 2

T2CM: Timer 2 Compare mode selection

Described elsewhere

Bit 1~0

T2I1, T2I0: Timer 2 input selection

Described elsewhere

IRCON2 Register

SFR Address: BFh

Bit

Name

—

LVDF

TBF

—

IADC

R/W

—

R/W

—

R/W

POR

—

Bit 7 ~ 4

Unimplemented, read as “0”

Bit 3

LVDF: LVD interrupt request flag

0: No request

1: Interrupt request

This bit will be cleared by hardware automatically.

Bit 2

TBF: Time Base interrupt request flag

0: No request

1: Interrupt request

This bit will be cleared by hardware automatically.

Bit 1

Unimplemented, read as “0”

Bit 0

IADC: ADC interrupt request flag

0: No request

1: Interrupt request

This bit will be cleared by hardware automatically.

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