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HT85F2240 bảng dữ liệu(PDF) 55 Page - Holtek Semiconductor Inc

tên linh kiện HT85F2240
Giải thích chi tiết về linh kiện  A/D Flash 8051 Core Low Pin Count MCU
PDF  147 Pages
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nhà sản xuất  HOLTEK [Holtek Semiconductor Inc]
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HT85F2240 bảng dữ liệu(HTML) 55 Page - Holtek Semiconductor Inc

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A/D Flash 8051 Core Low Pin Count MCU
HT85F2230/HT85F2240
The main system clock source, known as fSYS, and which is used by the CPU and the peripheral
functions, can come from one of two sources. These are the internal HIRC oscillator or the external
crystal HXT oscillator. The selection is implemented using the SCKS0 and SCKS1 bits in the
SCCR register. The HXT and HIRC oscillators also have independent enable control bits, which
are the HXTEN and HIRCEN bits in the HSOCR register. There are also two oscillator status bits,
HIRCRDY and HXTRDY, in the HSOCR register to indicate whether the oscillators are ready for
operation. After power on, these status bits should be monitored by the program to indicate the
“ready or not” status of the respective oscillator before they are used with instruction execution.
After power on, the device will automatically select the HIRC oscillator as its default system clock,
which can be changed later by the application program.
There is an additional internal 32KHz low frequency clock for the peripheral circuits. It is the
internal LIRC oscillator, which is enabled using the LIRCEN bit in the LSOCR register. There is
a low frequency oscillator status bit, LIRCRDY, to indicate the “ready or not” status of the LIRC
oscillator. This bit should be monitored by the program to indicate the “ready or not” status of the
oscillator before it is used for instruction execution. This bit will be automatically cleared to zero
by hareware when the LIRC is disabled and set high once the LIRC is stable.
System Clock Control Register – SCCR
SFR Address: ECh
Bit
7
6
5
4
3
2
1
0
Name
—
—
—
—
—
—
SCKS1
SCKS0
R/W
—
—
—
—
—
—
R/W
R/W
POR
—
—
—
—
—
—
0
0
Bit 7~2
Unimplemented, read as “0”
Bit 1~0
SCKS1, SCKS0: High Frequency System clock select
00: HIRC oscillator clock source
01: HIRC oscillator clock source
10: HXT oscillator clock source
11: PLL clock source
The HIRC will be the default system clock source after a power on reset.
When switching between different clock sources an oscillator stabilisation time delay
must be provided before continuing with program execution.



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