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PC87334VLJ bảng dữ liệu(PDF) 11 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện PC87334VLJ
Giải thích chi tiết về linh kiện  SuperI/O 3.3V/5V Floppy Disk Controller, Dual UARTs, Infrared, IEEE1284 Parallel Port, and IDE Interface
PDF  102 Pages
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10 Pin Description (Continued)
Symbol
PQFP
TQFP
IO
Function
Pin
Pin
DCD12
77 69
75 67
I
Data Carrier Detect
When low this signal indicates that the MODEM or data set has
detected the data carrierThe DCD signal is a MODEM status input whose condition the CPU
can test by reading bit 7 (DCD) of the MODEM Status Register (MSR) for the appropriate
serial channel Bit 7 is the complement of the DCD signal Bit 3 (DDCD) of the MSR indicates
whether the DCD input has changed state since the previous reading of the MSR
Note
Whenever the DDCD bit of the MSR is set an interrupt is generated if MODEM Status interrupts are enabled
DENSEL
Normal
48
46
O
Density Select
Indicates that a high FDC density data rate (500 kbps 1 Mbps or 2 Mbps) or
a low density data rate (250 kbps or 300 kbps) is selected DENSEL is active high for high
Mode
density (525 drives) when IDENT is high and active low for high density (35 drives) when
IDENT is low DENSEL is also programmable via the Mode command (see Section 426)
DENSEL
PPM
78
76
O
Density Select
This pin provides an additional Density Select signal in PPM Mode when
PNF e 0 (See AFD and Table 7-5 for further information)
Mode
DIR
Normal
41
39
O
Direction
This output determines the direction of the floppy disk drive (FDD) head
movement (active e step in inactive e step out) during a seek operation During reads or
Mode
writes DIR is inactive
DIR
PPM
80
78
O
Direction
This pin provides an additional direction signal in PPM Mode when PNF e 0 (See
INIT and Table 7-5 for further information)
Mode
DR01
Normal
44 45
42 43
O
Drive SeIect 01
These are the decoded Drive Select outputs that are controlled by the
Digital Output Register bits D0 D1 The Drive Select outputs are gated with DOR bits 4 – 7
Mode
These are active low outputs They are encoded with information to control four FDDs when
bit 4 of the Function Enable Register (FER) is set (See MTR01 for more information) DR0
exchanges logical drive values with DR1 when bit 4 of Function Control Register (FCR) is set
(See Table 7-5 for further information)
DR1
PPM
85
83
O
Drive Select 1
This pin provides an additional Drive Select signal in PPM Mode when PNF
e
0 It is drive select 1 when bit 4 of FCR is 0 It is drive select 0 when bit 4 of FCR is 1 This
Mode
signal is active low (See ACK and Table 7-5 for further information)
DRATE01
Normal
52 51
50 49
O
Data Rate 01
These outputs reflect the currently selected FDC data rate (bits 0 and 1 in the
Configuration Control Register (CCR) or the Data Rate Select Register (DSR) whichever was
Mode
written to last) The pins are totem-pole buffered outputs (6 mA sink 6 mA source)
DRATE0
PPM
87
85
O
Data Rate 0
This pin provides an additional Data Rate signal in PPM mode when PNF e 0
(See PD6 and Table 7-5 for further information)
Mode
DRID01
59 56
54 54
I
Drive ID
These pins accept input from the floppy disk drive which indicates the type of drive
in use These pins should be tied low if they are not used DRID1 is configured when bit 2 of
ASC is 1 and bit 1 of ASC is 0 (See IOCS16 IDEACK IDEHI VLD0 3F3RD IRTX and IRRX
for further information)
DRV2
49
47
I
Drive2
This input indicates whether a second floppy disk drive has been installed The state
of this pin is available from Status Register A in PS2 mode (See PNF for further
information)
DR23
49
47
I
Drive 2 or 3
DR23 is asserted when either Drive 2 or Drive 3 is accessed (except during
logical drive exchange see bit 3 of TDR) This pin is configured when bit 1 of ASC is 0 (See
DRV2 and PNF for further information)
11



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