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PC87334VLJ bảng dữ liệu(PDF) 88 Page - National Semiconductor (TI) |
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PC87334VLJ bảng dữ liệu(HTML) 88 Page - National Semiconductor (TI) |
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88 / 102 page ![]() 100 Electrical Characteristics (Continued) 103 AC Electrical Characteristics 50V g10% 33V g10% 1031 AC Test Conditions TA e 0 Cto70 C VDD e 50V g 10% 33V g 10% Input Pulse Levels Ground to 3V Input Rise and Fall Times 6 ns Input and Output Reference Levels 14V TRI-STATE Reference Levels Active High b05V Active Low a05V LOAD CIRCUIT (Notes 1 2 3 4) TLC12039 – 22 Note 1 CL e 100 pF includes jig and scope capacitance Note 2 S1 e Open for push-pull outputs S1 e VDD for high impedance to active low and active low to high impedance measurements S1 e GND for high impedance to active high and active high to high impedance measurements RL e 10 kX for mP interface pins Note 3 For the FDC Open Drive Interface Pins S1 e VDD and RL e 150X Note 4 For 3V operation it is recommended to connect all reset strap pins to the CMOS input AC TESTING INPUT AND OUTPUT WAVEFORM TLC12039 – 23 1032 Clock Timing Symbol Parameter Min Max Units tCH Clock High Pulse Width 16 ns tCL Clock Low Pulse Width 16 ns tCP Clock Period 40 43 ns tICP Internal Clock Period (See Table 10-1) tDRP Data Rate Period (See Table 10-1) TABLE 10-1 Nominal tICP and tDRP Values MFM Data Rate tDRP tICP Value Units 1 Mbps 1000 3 c tCP 125 ns 500 kbps 2000 3 c tCP 125 ns 300 kbps 3333 5 c tCP 208 ns 250 kbps 4000 6 c tCP 250 ns TLC12039 – 24 FIGURE 10-1 Clock Timing 88 |
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