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STM8S005C6 bảng dữ liệu(PDF) 77 Page - STMicroelectronics

tên linh kiện STM8S005C6
Giải thích chi tiết về linh kiện  Extended instruction set
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STM8S005C6 bảng dữ liệu(HTML) 77 Page - STMicroelectronics

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STM8S005C6 STM8S005K6
Electrical characteristics
84
9.3.9
I2C interface characteristics
Table 42. I2C characteristics
Symbol
Parameter
Standard mode I2CFast mode I2C(1)
1.
fMASTER, must be at least 8 MHz to achieve max fast I
2C speed (400kHz)
Unit
Min(2)
2.
Data based on standard I2C protocol requirement, not tested in production
Max(2)
Min(2)
Max(2)
tw(SCLL)
SCL clock low time
4.7
-
1.3
-
µs
tw(SCLH)
SCL clock high time
4.0
-
0.6
-
tsu(SDA)
SDA setup time
250
-
100
-
ns
th(SDA)
SDA data hold time
0(3)
3.
The maximum hold time of the start condition has only to be met if the interface does not stretch the low
time
-0(4)
4.
The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
undefined region of the falling edge of SCL
900(3)
tr(SDA)
tr(SCL)
SDA and SCL rise time
-
1000
-
300
tf(SDA)
tf(SCL)
SDA and SCL fall time
-
300
-
300
th(STA)
START condition hold time
4.0
-
0.6
-
µs
tsu(STA)
Repeated START condition setup time
4.7
-
0.6
-
tsu(STO)
STOP condition setup time
4.0
-
0.6
-
µs
tw(STO:STA)
STOP to START condition time
(bus free)
4.7
-
1.3
-
µs
Cb
Capacitive load for each bus line
-
400
-
400
pF



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