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STM8S005C6 bảng dữ liệu(PDF) 53 Page - STMicroelectronics |
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STM8S005C6 bảng dữ liệu(HTML) 53 Page - STMicroelectronics |
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53 / 97 page ![]() DocID022186 Rev 4 53/97 STM8S005C6 STM8S005K6 Electrical characteristics 84 Total current consumption in halt mode Low-power mode wakeup times Table 25. Total current consumption in halt mode at VDD = 5 V, TA -40 to 85° C Symbol Parameter Conditions Typ Max Unit IDD(H) Supply current in halt mode Flash in operating mode, HSI clock after wakeup 62 90 µA Flash in power-down mode, HSI clock after wakeup 6.5 25 Table 26. Total current consumption in halt mode at VDD = 3.3 V Symbol Parameter Conditions Typ Max at 85° C(1) Unit IDD(H) Supply current in halt mode Flash in operating mode, HSI clock after wakeup 60 90 µA Flash in power-down mode, HSI clock after wakeup 4.5 20 1. Data based on characterization results, not tested in production. Table 27. Wakeup times Symbol Parameter Conditions Typ Max(1) Unit tWU(WFI) Wakeup time from wait mode to run mode(3) -- (2) µs fCPU = fMASTER = 16 MHz. 0.56 - tWU(AH) Wakeup time active halt mode to run mode.(3) MVR voltage regulator on(4) Flash in operating mode(5) HSI (after wakeup) 1(6) 2(6) Flash in power-down mode(5) 3(6) - MVR voltage regulator off(4) Flash in operating mode(5) 48(6) - Flash in power-down mode(5) 50(6) - tWU(H) Wakeup time from halt mode to run mode(3) Flash in operating mode(5) 52 - Flash in power-down mode(5) 54 - 1. Data guaranteed by design, not tested in production. 2. tWU(WFI) = 2 x 1/fmaster + 7 x 1/fCPU 3. Measured from interrupt event to interrupt vector fetch. 4. Configured by the REGAH bit in the CLK_ICKR register. 5. Configured by the AHALT bit in the FLASH_CR1 register. 6. Plus 1 LSI clock depending on synchronization. |
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