ST7MC1K2 datasheet(32/371 Pages) STMICROELECTRONICS

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0074h

0075h

0076h

0077h

0078h

0079h

007Ah

007Bh

007Ch

007Dh

007Eh

PWM ART

PWMDCR3

PWMDCR2

PWMDCR1

PWMDCR0

PWMCR

ARTCSR

ARTCAR

ARTARR

ARTICCSR

ARTICR1

ARTICR2

PWM AR timer duty cycle register 3

PWM AR timer duty cycle register 2

PWM AR timer duty cycle register 1

PWM AR timer duty cycle register 0

PWM AR timer control register

Auto-reload timer control/status register

Auto-reload timer counter access register

Auto-reload timer auto-reload register

AR timer input capture control/status register

AR timer input capture register 1

AR timer input capture register 2

00h

R/W

Read only

007Fh

Op-amp

OACSR

Op-amp control/status register

00h

R/W

The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values of the

I/O pins are returned instead of the DR register contents.

R/W = read/write

The bits associated with unavailable pins must always keep their reset value.

x = undefined.

Table 3.

Hardware register map (continued)

Address

Block

label

Reset

status

Remarks

Obsolete

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