ST7MC1K2 datasheet(86/371 Pages) STMICROELECTRONICS

86 / 371 page

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On-chip peripherals

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On-chip peripherals

10.1

Window watchdog (WWDG)

10.1.1

Introduction

The window watchdog is used to detect the occurrence of a software fault, usually

generated by external interference or by unforeseen logical conditions, which causes the

application program to abandon its normal sequence. The watchdog circuit generates an

MCU reset on expiry of a programmed time period, unless the program refreshes the

contents of the downcounter before the T6 bit becomes cleared. An MCU reset is also

generated if the 7-bit downcounter value (in the control register) is refreshed before the

downcounter has reached the window register value. This implies that the counter must be

refreshed in a limited window.

10.1.2

Main features

●

Programmable free-running downcounter

●

Conditional reset

–

reset (if watchdog activated) when the downcounter value becomes less than 40h

–

reset (if watchdog activated) if the downcounter is reloaded outside the window

(see Figure 33)

●

Hardware/software watchdog activation (selectable by option byte)

●

Optional reset on HALT instruction (configurable by option byte).

10.1.3

Functional description

The counter value stored in the WDGCR register (bits T[6:0]), is decremented every 16384

fOSC2 cycles (approx.), and the length of the timeout period can be programmed by the user

in 64 increments.

If the watchdog is activated (the WDGA bit is set) and when the 7-bit downcounter (T[6:0]

bits) rolls over from 40h to 3Fh (T6 becomes cleared), it initiates a reset cycle pulling low the

reset pin for typically 30µs. If the software reloads the counter while the counter is greater

than the value stored in the window register, then a reset is generated.

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