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MSP430F423IPM bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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MSP430F423IPM bảng dữ liệu(HTML) 2 Page - Texas Instruments |
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2 / 59 page ![]() DV CC DV SS AV CC AV SS RST/NMI P1 Flash 32KB 16KB 8KB RAM 1KB 512 B 256 B Watchdog WDT+ 15 or 16 Bit Timer_A3 3 CC Reg Port 1 8 I/Os Interrupt Capability POR, SVS, Brownout Basic Timer 1 1 Interrupt Vector LCD 128 Segments 1,2,3,4 MUX f LCD 8 USART0 UART or SPI SD16 Three 16-Bit SIgma-Delta ADCs Oscillators FLL+ MCLK 8-MHz CPU Including 16 Registers XOUT JTAG Interface XIN SMCLK ACLK MDB MAB Emulation Module P2 Port 2 6 I/Os Interrupt Capability 6 Copyright © 2016, Texas Instruments Incorporated Hardware Multiplier MPY, MPYS, MAC,MACS 2 MSP430F427, MSP430F425, MSP430F423 SLAS421B – APRIL 2004 – REVISED NOVEMBER 2016 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430F427 MSP430F425 MSP430F423 Device Overview Copyright © 2004–2016, Texas Instruments Incorporated (1) For the most current part, package, and ordering information for all available devices, see the Package Option Addendum in Section 8, or see the TI website at www.ti.com. (2) The sizes shown here are approximations. For the package dimensions with tolerances, see the Mechanical Data in Section 8. Device Information(1) PART NUMBER PACKAGE BODY SIZE(2) MSP430F427IPM LQFP (64) 10 mm × 10 mm MSP430F425IPM LQFP (64) 10 mm × 10 mm MSP430F423IPM LQFP (64) 10 mm × 10 mm 1.4 Functional Block Diagram Figure 1-1 shows the functional block diagram. Figure 1-1. MSP430F42x Block Diagram |
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