LAN9250 datasheet(285/421 Pages) MICROCHIP

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DS00001913A-page 285

LAN9250

Figure 13-3 illustrates a typical I2C EEPROM addressing bit order for single and double byte addressing.

13.3.2

I2C EEPROM BYTE READ

Following the device addressing, a data byte may be read from the EEPROM by outputting a start condition and control

byte with a control code of 1010b, chip/block select bits as described in Section 13.3.1 and the R/~W bit high. The

EEPROM will respond with an acknowledge, followed by 8 bits of data. If the EEPROM slave fails to send an acknowl-

edge, then the sequence is aborted (a start condition and a stop condition are sent) and the EEPROM Controller Tim-

eout (EPC_TIMEOUT) bit in the EEPROM Command Register (E2P_CMD) is set. The I2C master then sends a no-

acknowledge, followed by a stop condition.

Figure 13-4 illustrates a typical I2C EEPROM byte read for single and double byte addressing.

For a register level description of a read operation, refer to Section 13.3.7, "I2C Master EEPROM Controller Operation,"

on page 288.

13.3.3

I2C EEPROM SEQUENTIAL BYTE READS

Following the device addressing, data bytes may be read sequentially from the EEPROM by outputting a start condition

and control byte with a control code of 1010b, chip/block select bits as described in Section 13.3.1 and the R/~W bit

high. The EEPROM will respond with an acknowledge, followed by 8 bits of data. If the EEPROM slave fails to send an

acknowledge, then the sequence is aborted (a start condition and a stop condition are sent) and the EEPROM Controller

Timeout (EPC_TIMEOUT) bit in the EEPROM Command Register (E2P_CMD) is set. The I2C master then sends an

acknowledge and the EEPROM responds with the next 8 bits of data. This continues until the last desired byte is read,

at which point the I2C master sends a no-acknowledge (instead of the acknowledge), followed by a stop condition.

FIGURE 13-3:

I2C EEPROM ADDRESSING

FIGURE 13-4:

I2C EEPROM BYTE READ

S 1 0 1 0

R/~W

Control Byte

Chip / Block

Select Bits

S 1 0 1 0

Control Byte

Single Byte Addressing

Double Byte Addressing

Address Byte

Address Low

Byte

Address High

Byte

0 0 0

R/~W

Chip / Block

Select Bits

S 1 0 1 0

Control Byte

S 1 0 1 0

Control Byte

Single Byte Addressing Read

Double Byte Addressing Read

0 0 0

Data Byte

R/~W

Chip / Block

Select Bits

R/~W

Chip / Block

Select Bits

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