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CP3SP33SMS/NOPB bảng dữ liệu(PDF) 341 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces
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CP3SP33
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SNOSCW5 – MAY 2013
Table 33-2. VTU Registers (continued)
NAME
ADDRESS
DESCRIPTION
IO1CTL_0
FF 8804h
I/O Control Register 1 Module 0
IO1CTL_1
FF 8C04h
I/O Control Register 1 Module 1
IO2CTL_0
FF 8808h
I/O Control Register 2 Module 0
IO2CTL_1
FF 8C08h
I/O Control Register 2 Module 1
INTCTL_0
FF 880Ch
Interrupt Control Register Module 0
INTCTL_1
FF 8C0Ch
Interrupt Control Register Module 1
INTPND_0
FF 8810h
Interrupt Pending Register Module 0
INTPND_1
FF 8C10h
Interrupt Pending Register Module 1
CLK1PS_0
FF 8814h
Clock Prescaler Register 1 Module 0
CLK1PS_1
FF 8C14h
Clock Prescaler Register 1 Module 1
CLK2PS_0
FF 8830h
Clock Prescaler Register 2 Module 0
CLK2PS_1
FF 8C30h
Clock Prescaler Register 2 Module 1
COUNT1_0
FF 8818h
Counter 1 Register Module 0
COUNT1_1
FF 8C18h
Counter 1 Register Module 1
PERCAP1_0
FF 881Ch
Period/Capture 1 Register Module 0
PERCAP1_1
FF 8C1Ch
Period/Capture 1 Register Module 1
DTYCAP1_0
FF 8820h
Duty Cycle/Capture 1 Register Module 0
DTYCAP1_1
FF 8C20h
Duty Cycle/Capture 1 Register Module 1
COUNT2_0
FF 8824h
Counter 2 Register Module 0
COUNT2_1
FF 8C24h
Counter 2 Register Module 1
PERCAP2_0
FF 8828h
Period/Capture 2 Register Module 0
PERCAP2_1
FF 8C28h
Period/Capture 2 Register Module 1
DTYCAP2_0
FF 882Ch
Duty Cycle/Capture 2 Register Module 0
DTYCAP2_1
FF 8C2Ch
Duty Cycle/Capture 2 Register Module 1
COUNT3_0
FF 8834h
Counter 3 Register Module 0
COUNT3_1
FF 8C34h
Counter 3 Register Module 1
PERCAP3_0
FF 8838h
Period/Capture 3 Register Module 0
PERCAP3_1
FF 8C38h
Period/Capture 3 Register Module 1
DTYCAP3_0
FF 883Ch
Duty Cycle/Capture 3 Register Module 0
DTYCAP3_1
FF 8C3Ch
Duty Cycle/Capture 3 Register Module 1
COUNT4_0
FF 8840h
Counter 4 Register Module 0
COUNT4_1
FF 8C40h
Counter 4 Register Module 1
PERCAP4_0
FF 8844h
Period/Capture 4 Register Module 0
PERCAP4_1
FF 8C44h
Period/Capture 4 Register Module 1
DTYCAP4_0
FF 8848h
Duty Cycle/Capture 4 Register Module 0
DTYCAP4_1
FF 8C48h
Duty Cycle/Capture 4 Register Module 1
33.2.1 Mode Control Register Module n (MODE_n)
The MODE_n registers are 16-bit, read/write registers which control the mode selection of the four timer
subsystems in each module. The registers are clear after reset.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TMOD4
T8RUN
T7RUN
TMOD3
T6RUN
T5RUN
TMOD2
T4RUN
T3RUN
TMOD1
T2RUN
T1RUN
TxRUN
The Timer Run bit controls whether the corresponding timer is stopped or running. If set, the
associated counter and clock prescaler is started depending on the mode of operation. Once
set, the clock to the clock prescaler and the counter are enabled and the counter will increment
each time the clock prescaler counter value matches the value defined in the associated clock
prescaler field (CxPRSC).
Copyright © 2013, Texas Instruments Incorporated
Dual Versatile Timer Units (VTU)
341
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