CS8900A datasheet(38/128 Pages) CIRRUS

38 / 128 page

DS271PP3

CS8900A

Crystal LAN™ ISA Ethernet Controller

CIRRUS LOGIC PRODUCT DATA SHEET

sion, or if the Carrier Sense signal is deasserted

before the end of the transmission, there is a Loss-

of-Carrier error and the Loss-of-CRS bit (Register

8, TxEvent, Bit 6) is set.

3.12.2 AUI Receiver

The AUI receiver is a differential pair circuit that

connects directly to the DI+/DI- pins. It is designed

to distinguish between transient noise pulses and

incoming Ethernet packets. Incoming packets with

proper amplitude and pulse width are passed on to

the ENDEC section, while unwanted noise is re-

jected.

3.12.3 Collision Detection

The AUI collision circuit is a differential pair re-

ceiver that detects the presence of collision signals

on the CI+/CI- pins. The collision signal is generat-

ed by an external Ethernet transceiver whenever a

collision is detected on the Ethernet segment. (Sec-

tion 7.3.1.2 of ISO/IEC 8802-3, 1993, defines the

collision signal as a 10 MHz ± 15% signal with a

duty cycle no worse than 60/40). When a collision

is present, the AUI Collision circuit informs the

MAC by asserting the internal Collision signal.

3.13 External Clock Oscillator

A 20-MHz quartz crystal or CMOS clock input is

required by the CS8900A. If a CMOS clock input

is used, it should be connected the to XTAL1 pin,

with the XTAL2 pin left open. The clock signal

should be 20 MHz

±0.01% with a duty cycle be-

tween 40% and 60%. The specifications for the

crystal are described in Section 7.7 on page 121.

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