CS8900A datasheet(20/128 Pages) CIRRUS

20 / 128 page

DS271PP3

CS8900A

Crystal LAN™ ISA Ethernet Controller

CIRRUS LOGIC PRODUCT DATA SHEET

After a reset, the ISA bus outputs INTRx and

DMARQx are 3-Stated, thus avoiding any interrupt

or DMA channel conflicts on the ISA bus at power-

up time.

3.3.4 Initialization

After each reset (except EEPROM Reset), the

CS8900A checks the sense of the EEDataIn pin to

see if an external EEPROM is present. If EEDI is

high, an EEPROM is present and the CS8900A au-

tomatically loads the configuration data stored in

the EEPROM into its internal registers (see next

section). If EEDI is low, an EEPROM is not

present and the CS8900A comes out of reset with

the default configuration shown in Table 3.

A low-cost serial EEPROM can be used to store

configuration information that is automatically

loaded into the CS8900A after each reset (except

EEPROM reset). The use of an EEPROM is op-

tional.

The CS8900A operates with any of six standard

EEPROM’s shown in Table 4.

PacketPage

Address

Contents

0020h

0300h

I/O Base Address*

0022h

XXXX XXXX

XXXX X100

Interrupt Number

0024h

XXXX XXXX

XXXX XX11

DMA Channel

0026h

0000h

DMA Start of Frame

Offset

0028h

X000h

DMA Frame Count

002Ah

0000h

DMA Byte Count

002Ch

XXX0 0000h Memory Base Address

0030h

XXX0 0000h Boot PROM Base

Address

0034h

XXX0 0000h Boot PROM Address

Mask

0102h

0003h

0104h

0005h

0106h

0007h

0108h

0009h

010Ah

000Bh

010Ch

Undefined

Reserved

010Eh

Undefined

Reserved

0110h

Undefined

Reserved

0112h

00013h

0114h

0015h

0116h

0017h

0118h

0019h

* I/O base address is unaffected by Software Suspend mode.

Table 3.

Default Configuration

EEPROM Type

Size (16-bit words)

‘C46 (non-sequential)

‘CS46 (sequential)

‘C56 (non-sequential)

128

‘CS56 (sequential)

128

‘C66 (non-sequential)

256

‘CS66 (sequential)

256

Table 4. Supported EEPROM Types

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