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PI7C7300DNA bảng dữ liệu(PDF) 92 Page - Pericom Semiconductor Corporation |
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PI7C7300DNA bảng dữ liệu(HTML) 92 Page - Pericom Semiconductor Corporation |
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92 / 107 page ![]() PI7C7300D 3-PORT PCI-TO-PCI BRIDGE Page 92 of 107 Pericom Semiconductor November 2005 - Revision 1.01 14.1.43 SECONDARY SUCCESSFUL MEMORY READ COUNTER REGISTER – Offset 88h Bit Function Type Description 31:0 Successful Memory Read Counts on S1 or S2 R/W Stores the successful memory read count on S1 or S2 and is updated when the sampling timer is active. Reset to 0 14.1.44 SECONDARY SUCCESSFUL MEMORY WRITE COUNTER REGISTER – OFFSET 8Ch Bit Function Type Description 31:0 Successful Memory Write Counts on S1 or S2 R/W Stores the successful memory write count on S1 or S2 and is updated when the sampling timer is active. Reset to 0 14.1.45 PRIMARY SUCCESSFUL I/O READ COUNTER REGISTER – OFFSET 90h Bit Function Type Description 31:0 Successful I/O Read Counts on Primary R/W Stores the successful I/O read count on Primary and is updated when the sampling timer is active. Reset to 0 14.1.46 PRIMARY SUCCESSFUL I/O WRITE COUNTER REGISTER – OFFSET 94h Bit Function Type Description 31:0 Successful I/O Write Counts on Primary R/W Stores the successful I/O write count on Primary and is updated when the sampling timer is active. Reset to 0 14.1.47 PRIMARY SUCCESSFUL MEMORY READ COUNTER REGISTER – OFFSET 98h Bit Function Type Description 31:0 Successful Memory Read Counts on Primary R/W Stores the successful memory read count on Primary and is updated when the sampling timer is active. Reset to 0 |
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