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UCC24636DBVT bảng dữ liệu(PDF) 3 Page - Texas Instruments

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tên linh kiện UCC24636DBVT
Giải thích chi tiết về linh kiện  Synchronous Rectifier (SR) Controller
PDF  35 Pages
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UCC24636DBVT bảng dữ liệu(HTML) 3 Page - Texas Instruments

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3
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6
DRV
GND
VPC
TBLK
VSC
VDD
1
2
3
4
5
6
3
UCC24636
www.ti.com
SLUSCG2A – MARCH 2016 – REVISED MARCH 2016
Product Folder Links: UCC24636
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
5 Device Comparison Table
PART NUMBER
CCM DEAD TIME CONTROL
tOFF (µs)
FSW(MAX) (kHz)
UCC24636
No
4.35
130
UCC24630
Yes
2.5
200
(1)
P = Power, G = Ground, I = Input, O = Output, I/O = Input/Output
6 Pin Configuration and Functions
DBV Package
6-Pin SOT23
Top View
Pin Functions
PIN
I/O(1)
DESCRIPTION
NO.
NAME
1
VPC
I
The Voltage during Primary Conduction pin is connected to a resistor divider from the SR MOSFET
drain. This pin determines a sample of the primary-side MOSFET volt seconds during the primary on-
time. This voltage programs a voltage controlled current source for the internal VPC ramp charging
current.
2
VSC
I
The Voltage during Secondary Conduction pin is connected to a resistor divider from the power-supply
output. This pin determines a sample of the secondary-side output voltage used to determine SR
MOSFET conduction time. This voltage programs a voltage controlled current source for the internal VSC
ramp charging current.
3
TBLK
–
TIME BLANK pin is used to select the blanking time of the VPC rising edge. A programmable range from
200 ns to 2 µs is available to prevent false detection of the primary on-time due to ringing during DCM
operation.
4
DRV
O
DRIVE is an output used to drive the gate of an external synchronous rectifier N-channel MOSFET
switching transistor, with source pin connected to GND.
5
GND
G
The GROUND pin is both the reference pin for the controller and the low-side return for the drive output.
Special care should be taken to return all AC decoupling capacitors as close as possible to this pin and
avoid any common trace length with analog signal return paths.
6
VDD
P
VDD is the bias supply input pin to the controller. A carefully placed bypass capacitor to GND is required
on this pin.



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