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UCC24636DBVT bảng dữ liệu(PDF) 25 Page - Texas Instruments |
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UCC24636DBVT bảng dữ liệu(HTML) 25 Page - Texas Instruments |
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25 / 35 page ![]() VPC BLK t 100 ns R22 18 pF - - = VSC(max) OUT(max) VSC(max) R23 V ( ) V R11 R23 V 1.74 V ª º u « » ¬ ¼ VSC(min) OUT(min) VSC(min) R23 V ( ) V R11 R23 V 0.52 V ª º u « » ¬ ¼ VPC _ VSC R9 R21 R9 R11 1 R23 Ratio 1.1 R23 47 k R11 115 k é ù + æ ö ê ú ç ÷ = - ´ ê ú ç ÷ ´ ê ú ç ÷ ç ÷ ê ú è = ø ë û = W W 25 UCC24636 www.ti.com SLUSCG2A – MARCH 2016 – REVISED MARCH 2016 Product Folder Links: UCC24636 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 9.2.3.2 VSC Input The value of R23 is recommended to be with the range of 25 k Ω to 50 kΩ. There is a 10% margin included for the initial value calculation of R11 to provide timing margin during initial operation verification. (11) With R11 = 115 k Ω, the operating range of the VSC pin is: (12) (13) Therefore, VVSC is within the recommended range of 0.3 V to 2.2 V. The UCC24636 SR timing can be optimized (SR on time increased) by increasing the R115 value after initial operation confirmation. The RatioVPC_VSC parameter has a positive tolerance of 5.3%. Using 1% divider resistors for VPC and VSC should allow reducing the 10% initial SR timing margin. 9.2.3.3 TBLK Input The blanking time is set with resistor R22. Select the blanking time to meet the following criteria based on 660-ns minimum primary on-time at high line. tVPC-BLK = (tPRI × 0.85) – 120 ns spacer (14) A value of R22 = 20 k Ω results in a blanking time of approximately 460 ns. |
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