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UPD78C18 bảng dữ liệu(PDF) 19 Page - NEC |
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UPD78C18 bảng dữ liệu(HTML) 19 Page - NEC |
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19 / 110 page ![]() 19 µPD78C17,78C18 2.4 MEMORY The µPD78C17 and 78C18 can address a maximum of 64 Kbytes of memory. The memory maps are shown in Figs. 2-3 and 2-4. The external memory area and the internal RAM area can be freely used as program memory and data memory. Because the access timing for internal memory and external memory are the same, pro- cessing can be executed at high speeds. (a) Interrupt start addresses The interrupt start addresses are all fixed as follows: NMI ....................... 0004H INTT0/INTT1 ......... 0008H INT1/INT2 ............. 0010H INTE0/INTE1 ......... 0018H INTEIN/INTAD ...... 0020H INTSR/INTST ........ 0028H SOFTI .................... 0060H (b) Call address table The call address of a 1-byte call instruction (CALT) can be stored in the 64-byte area (for 32 call ad- dresses) from address 0080H to address 00BFH. (c) Specific memory area The reset start address, interrupt start addresses, and the call table are allocated to addresses 0000H to 00BFH, and this area takes account of these in use. Addresses 0800H to 0FFFH are directly addressable by a 2-byte call instruction (CALF). The µPD78C18 has on-chip mask programmable ROM in addresses 0000H to 7FFFH. (d) Internal data memory area 1-Kbyte RAM is incorporated in addresses FC00H to FFFFH. The RAM contents are retained for 1-Kbyte internal data memory area in standby operation. (e) External memory area With the µPD78C17, the external memory can be expanded in steps in 63-Kbyte area (0000H to FBFFH) by setting the MODE0 and MODE1 pins (see Table 2-3). With the µPD78C18, the external memory can be expanded in steps in 31-Kbyte area (8000H to FBFFH) by setting the MEMORY MAPPING register (see Fig. 2-13). The external memory is accessed using AD7 to AD0 (multiplexed address/data bus), AB7 to AB0 (ad- dress bus), and the RD, WR, and ALE signals. Both programs and data can be stored in the external memory. (f) Working register area A 256-byte working register area can be set in any memory location (specified by the V register) and working register addressing is possible. |
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