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UPD78C18 bảng dữ liệu(PDF) 67 Page - NEC

tên linh kiện UPD78C18
Giải thích chi tiết về linh kiện  8-BIT SINGLE-CHIP MICROCONTROLLER WITH A/D CONVERTER
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nhà sản xuất  NEC [NEC]
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UPD78C18 bảng dữ liệu(HTML) 67 Page - NEC

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µPD78C17,78C18
(2) Release by interrupt request flag
The HALT mode is released if at least one interrupt request flag is set by the generation of a non-maskable
interrupt (NMI) or one of ten unmasked maskable interrupts (INTT0, INTT1, INT1, INT2, INTE0, INTE1, INTEIN,
INTAD, INTST, and INTSR).
When the HALT mode is released by a non-maskable interrupt, the instruction following the HLT instruction
is not executed and the program jumps to the interrupt address (0004H) irrespective of the interrupt enabled/
disabled (EI/DI) state.
When the HALT mode is released by a maskable interrupt, operation after release differs depending on
whether the EI or DI state is set.
(i)
EI state
The instruction following the HLT instruction is not executed and the program jumps to the corresponding
interrupt address.
Fig. 4-2 HALT Mode Release Timing (in EI State)
CPU
Operation
OSC
INTF
×
HLT
Interrupt Execution Interrupt Routine
(ii) DI state
Execution restarts with the instruction following the HLT instruction (without jumping to the interrupt
address). Because the interrupt request flag used for release remains set, it should be reset by a skip
instruction when required.
Fig. 4-3 HALT Mode Release Timing (in DI State)
CPU
Operation
OSC
INTF
×
HLT
Following Instruction
Execution



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