RM0319 datasheet(217/368 Pages) STMICROELECTRONICS

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RM0319

Asynchronous serial ports (UART)

Doc ID 022640 Rev 3

217/368

Asynchronous serial ports (UART)

This chapter focuses on UART functionality and operation.

For technical details about the programmable registers related to the UART, refer to the

UART registers in the following companion document:

●

RM0321: SPEAr320S address map and registers

16.1

Overview

Asynchronous serial ports (commonly referred as UARTs) perform the main task in

computer serial communication by converting incoming parallel information into serial data

and incoming serial information into parallel data that can be sent on a communication line

connected to an external peripheral device.

SPEAr320S integrates 7 instances of UART and an extra UART interface with output enable

for a RS485 transceiver.

16.2

Main features

●

Separate 16 x 8 (16 location deep x 8-bit wide) transmit and 16 x 12 receive FIFOs to

reduce CPU interrupts

●

Provides programmable FIFO disabling for 1-byte depth

●

Programmable baud rate generator that enables division of the reference clock by

(1 x 16) to (65535 x 16) and generates an internal x16 clock. The divisor can be a

fractional number.

●

Provides standard asynchronous communication bits (start, stop and parity) which are

added prior transmission and removed on reception

●

Supplies independent masking of transmit or receive FIFOs, receive timeout, and error

condition interrupts. According to the configuration mode selected, hardware and

software flow control as well as a modem interface is available.

●

Supports DMA

●

Detects false start bit

●

Generates and detects line break

●

Fully-programmable serial interface characteristics:

–

data can be 5, 6, 7, or 8 bits

–

even, odd, stick, or no-parity bit generation and detection

–

1 or 2 stop bit generation

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