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RM0319 bảng dữ liệu(PDF) 195 Page - STMicroelectronics |
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RM0319 bảng dữ liệu(HTML) 195 Page - STMicroelectronics |
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195 / 368 page  RM0319 Controller area network ports (CAN) Doc ID 022640 Rev 3 195/368 Figure 67. Data transfer between IFx registers and message RAM After the partial write of a message object, that Message Buffer registers that are not selected in the Command Mask register will set to the actual contents of the selected message object. After the partial read of a message object, those Message Buffer registers that are not selected in the Command Mask register will be left unchanged. Transmission of messages If the shift register of the CAN core cell is ready for loading and there is no data transfer between the IFx registers and the message RAM, the MsgVal bits in the Message Valid register and the TxRqst bits in the Transmission Request register are evaluated. The valid message object with the highest priority pending transmission request is loaded into the Shift register by the message handler and the transmission is started. The message object NewDat bit is reset. After a successful transmission and if no new data has been written to the message object (NewDat = ‘0’) since the start of the transmission, the TxRqst bit resets. If TxIE is set, IntPnd Start Write Command Request Register Busy = 1 CAN_WAIT_B = 0 WR/RD = 1 Read Message Object to IFx Write IFx to Message RAM Read Message Object to IFx Busy = 0 CAN_WAIT_B = 1 No No Yes Yes |
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