PM0214 datasheet(61/245 Pages) STMICROELECTRONICS

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PM0214

The STM32 Cortex-M4 instruction set

244

3.3.4

Shift operations

the shift length. Register shift can be performed:

•

Directly by the instructions ASR, LSR, LSL, ROR, and RRX. The result is written to a

destination register.

•

During the calculation of operand2 by the instructions that specify the second operand

as a register with shift (see Flexible second operand on page 59). The result is used by

the instruction.

The permitted shift lengths depend on the shift type and the instruction (see the individual

instruction description or Flexible second operand). If the shift length is 0, no shift occurs.

The following sub-sections describe the various shift operations and how they affect the

carry flag. In these descriptions, Rm is the register containing the value to be shifted, and n is

the shift length.

ASR

Arithmetic shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by

n places, into the right-hand 32-n bits of the result. And it copies the original bit[31] of the

You can use the ASR #n operation to divide the value in the register Rm by 2n, with the result

being rounded towards negative-infinity.

When the instruction is ASRS or when ASR #n is used in operand2 with the instructions

MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated

to the last bit shifted out, bit[n-1], of the register Rm.

Note:

If n is 32 or more, all the bits in the result are set to the value of bit[31] of Rm.

If n is 32 or more and the carry flag is updated, it is updated to the value of bit[31] of Rm.

Figure 13. ASR#3

LSR

Logical shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n

places, into the right-hand 32-n bits of the result. And it sets the left-hand n bits of the result

to 0 (see Figure 14).

You can use the LSR #n operation to divide the value in the register Rm by 2n, if the value is

regarded as an unsigned integer.

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