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PM0020 bảng dữ liệu(PDF) 84 Page - STMicroelectronics

tên linh kiện PM0020
Giải thích chi tiết về linh kiện  STR91xFA Flash programming manual
PDF  87 Pages
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PM0020 bảng dữ liệu(HTML) 84 Page - STMicroelectronics

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ISC logic description
PM00020
84/87
needs time to complete and may take up to 50uS before JTAG is ready to accept the next
command.
12.5.24
Abort handling
Table 50.
Abort handling summary
Abort condition
Aborted Instruction
Abort handling
Vcc Power Down
All
None((1))
– Test-Logic-Reset
(TRST,
LVD_RESET)
– ISC_DISABLE
Isc_Program,
Isc_Program_Uc,
Isc_Program_Security
Isc_Erase
Isc_Blank_Check
1) Abort condition is latched in Micro-osc domain.
2) An abort request is sent to the Micro. The Micro operates to
switch off the pumps, to discharge the capacitances, and to clear its
own status. When Micro finishes, it sends an acknowledgment to
ISC
3) ISC resets the ISC_Algorithm and then the Flash_Interface and
all the other blocks.
Almost 50 us are required to complete the abort sequence. During
this time no instruction should be issued.
Isc_Read
1) Abort condition is latched in Micro-osc domain.
2) ISC resets the ISC_Algorithm and then the Flash_Interface and
all the other blocks.
All the abort sequence will finish within 1 us. In this time no
instruction should be issued.
1.
The Security and Lock bits have a protection in the double program cycle.



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