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AN3427 bảng dữ liệu(PDF) 47 Page - STMicroelectronics |
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AN3427 bảng dữ liệu(HTML) 47 Page - STMicroelectronics |
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47 / 52 page ![]() AN3427 Firmware migration using the library Doc ID 019001 Rev 1 47/52 DMA_Cmd(DMA2_Stream0, ENABLE); The source code changes in DMA_InitStructure members are indicated in Bold and BoldItalic: 1. The structure members indicated in Bold were added vs. STM32 F1 series and used to configure the DMA FIFO mode and its Threshold, Burst mode for source and/or destination. 2. The name of the structure members indicated in BoldItalic were changed vs. STM32 F1 series a) In STM32F2xx Library the name of “DMA_MemoryBaseAddr” member was changed to “DMA_Memory0BaseAddr”, since the DMA is able to manage two buffers for data transfer: – “DMA_Memory0BaseAddr”: specifies the memory base address for DMAy Streamx, it’s the default memory used when double buffer mode is not enabled. – “DMA_Memory1BaseAddr”: specifies the base address of the second buffer, when buffer mode is enabled. b) In STM32F2xx Library the possible values of “DMA_DIR” member were changed to “DMA_DIR_PeripheralToMemory”, “DMA_DIR_MemoryToPeripheral” and “DMA_DIR_MemoryToMemory”. 4.7 ADC This section gives an example of how to port existing code from STM32 F1 series to F2 series. The example below shows how to configure the ADC1 to continuously convert channel14 in STM32 F1 series: ... /* ADCCLK = PCLK2/4 */ RCC_ADCCLKConfig(RCC_PCLK2_Div4); /* Enable ADC's APB interface clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); /* Configure ADC1 to convert continously channel14 */ ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfChannel = 1; ADC_Init(ADC1, &ADC_InitStructure); /* ADC1 regular channel14 configuration */ ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 1, ADC_SampleTime_55Cycles5); /* Enable ADC1's DMA interface */ ADC_DMACmd(ADC1, ENABLE); /* Enable ADC1 */ ADC_Cmd(ADC1, ENABLE); /* Enable ADC1 reset calibration register */ ADC_ResetCalibration(ADC1); /* Check the end of ADC1 reset calibration register */ while(ADC_GetResetCalibrationStatus(ADC1)); |
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