WM1811A datasheet(101/328 Pages) WOLFSON

101 / 328 page

Production Data

WM1811A

PD, November 2013, Rev 4.1

101

Table 54 and Table 55 describe the recommended sequences for enabling and disabling these output

drivers.

SEQUENCE

HEADPHONE ENABLE

Step 1

Write 0x0003 to Register R258 (0102h)

Write 0x0C07 to Register R86 (0056h)

Write 0x007E to Register R93 (005Dh)

Write 0x0000 to Register R94 (005Eh)

Write 0x0000 to Register R258 (0102h)

(These register writes must be executed in the order noted

above.)

Step 2

HPOUT1L_ENA = 1

HPOUT1R_ENA = 1

Step 3

s delay

Step 4

HPOUT1L_DLY = 1

HPOUT1R_DLY = 1

Step 5

Run the DC Servo in Start-Up mode:

Write 0x0033 to R84 (0054h)

Step 6

Wait until offset correction is complete:

This is indicated when DCS_STARTUP_COMPLETE=11b

Step 7

Read back DCS_DAC_WR_VAL_0 and

DCS_DAC_WR_VAL_1 from Register R89 (0059h)

Step 8

Subtract 0x09 from DCS_DAC_WR_VAL_0

Subtract 0x05 from DCS_DAC_WR_VAL_1

Step 9

Write the updated values of DCS_DAC_WR_VAL_0 and

DCS_DAC_WR_VAL_1 to Register R89 (0059h)

Step 10

Run the DC Servo in DAC Write mode:

Write 0x000F to R84 (0054h)

Step 11

HPOUT1L_OUTP = 1

HPOUT1L_RMV_SHORT = 1

HPOUT1R_OUTP = 1

HPOUT1R_RMV_SHORT = 1

Table 54 Headphone Output Enable Sequence

SEQUENCE

HEADPHONE DISABLE

Step 1

HPOUT1L_RMV_SHORT = 0

HPOUT1L_DLY = 0

HPOUT1L_OUTP = 0

HPOUT1R_RMV_SHORT = 0

HPOUT1R_DLY = 0

HPOUT1R_OUTP = 0

Step 2

HPOUT1L_ENA = 0

HPOUT1R_ENA = 0

Table 55 Headphone Output Disable Sequence

The register bits relating to pop suppression control are defined in Table 56.

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