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TMS470MF06607 bảng dữ liệu(PDF) 13 Page - Texas Instruments |
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TMS470MF06607 bảng dữ liệu(HTML) 13 Page - Texas Instruments |
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13 / 65 page ![]() TMS470MF06607 www.ti.com SPNS157C – JANUARY 2012 Table 2-8. Terminal Functions (continued) TERMINAL INPUT OUTPUT VOLTAGE(1) IPU/IPD(4) DESCRIPTION 100 CURRENT(3) NAME (2) PIN GENERAL-PURPOSE I/O (GIO) GIOA[4]/INT[4] 5 General-purpose input/output pins. Adaptive GIOA[5]/INT[5] 6 100 pin - GIOA[7:4]/INT[7:4] are interrupt-capable Programmable 3.3-V I/O impedance 4 pins. IPD (100 µA) GIOA[6]/INT[6] 15 mA GIOA[7]/INT[7] 16 MULTI-BUFFERED SERIAL PERIPHERAL INTERFACE 1 (MIBSPI1) MIBSPI1CLK 34 MIBSPI1 clock. MIBSPI1CLK can be programmed as a GIO pin. MIBSPI1SCS[0] 33 MIBSPI1sCS[1] 32 MIBSPI1SCS[2] 31 MIBSPI1SCS[3] 30 MIBSPI1 slave chip select. MIBSPI1SCS[7:0] can be Adaptive programmed as a GIO pins. MIBSPI1SCS[4] 29 Programmable 3.3-V I/O impedance 4 IPU (100 µA) MIBSPI1SCS[5] 28 mA MIBSPI1SCS[6] 27 MIBSPI1SCS[7] 26 MIBSPI1SIMO 35 MIBSPI1 data stream. Slave in/master out. MIBSPI1SIMO can be programmed as a GIO pin. MIBSPI1SOMI 36 MIBSPI1 data stream. Slave out/master in. MIBSPI1SOMI can be programmed as a GIO pin. MULTI-BUFFERED SERIAL PERIPHERAL INTERFACE 2 (MIBSPIP2) MIBSPIP2CLK 17 MIBSPIP2 clock. MIBSPIP2CLK can be programmed as a GIO pin. MIBSPIP2SCS[0] 1 MIBSPIP2SCS[1] 2 MIBSPIP2 slave chip select MIBSPIP2SCS[3:0] can be programmed as GIO pins. MIBSPIP2SCS[2] 3 MIBSPIP2SCS[3] 4 Adaptive Programmable 3.3-V I/O impedance 4 MIBSPIP2ENA 90 MIBSPIP2 enable pin. MIBSPIP2ENA can be IPU (100 µA) mA programmed as a GIO pin. MIBSPIP2SIMO 18 MIBSPIP2 data stream. Slave in/master out. MIBSPIP2SIMO pins can be programmed as a GIO pins. MIBSPIP2SOMI 19 MIBSPIP2 data stream. Slave out/master in. MIBSPIP2SOMI pins can be programmed as GIO pins. LOCAL INTERCONNECT NETWORK 1/SERIAL COMMUNICATIONS INTERFACE 1 (LIN1/SCI1) LIN1/SCI1RX 23 LIN/SCI1 data receive. Can be programmed as a GIO Adaptive pin. Programmable 3.3-V I/O impedance 4 IPU (100 µA) LIN1/SCI1TX 22 LIN/SCI1 data transmit. Can be programmed as a mA GIO pin. LOCAL INTERCONNECT NETWORK 2/SERIAL COMMUNICATIONS INTERFACE 2 (LIN2/SCI2) LIN2/SCI2RX 25 LIN/SCI2 data receive. Can be programmed as a GIO Adaptive pin. Programmable 3.3-V I/O impedance 4 IPU (100 µA) LIN2/SCI2TX 24 LIN/SCI2 data transmit. Can be programmed as a mA GIO pin. MULTI-BUFFERED ANALOG-TO-DIGITAL CONVERTER (MIBADC) ADEVT 68 3.3-V I/O Adaptive Programmable MibADC event input. Can be programmed as a GIO impedance 4 IPD (100 µA) pin. mA Copyright © 2012, Texas Instruments Incorporated Device Overview 13 Submit Documentation Feedback Product Folder Link(s): TMS470MF06607 |
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