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TMS470MF06607 bảng dữ liệu(PDF) 7 Page - Texas Instruments |
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TMS470MF06607 bảng dữ liệu(HTML) 7 Page - Texas Instruments |
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7 / 65 page ![]() TMS470MF06607 www.ti.com SPNS157C – JANUARY 2012 1 Features ................................................... 1 3.12 Device Identification Code Register ................ 30 1.1 PZ Package View .................................... 2 3.13 Device Part Numbers ............................... 31 1.2 Description ........................................... 3 4 Device Operating Conditions ....................... 32 4.1 Absolute Maximum Ratings Over Operating 1.3 Functional Block Diagram ............................ 5 Free-Air Temperature Range, Q Version ........... 32 1.4 Terms and Acronyms ................................ 6 4.2 Device Recommended Operating Conditions ...... 32 2 Device Overview ........................................ 8 4.3 Electrical Characteristics Over Recommended 2.1 Memory Map Summary .............................. 9 Operating Free-Air Temperature Range, Q Version 2.2 Terminal Functions ................................. 12 ...................................................... 33 2.3 Device Support ..................................... 16 5 Peripheral Information and Electrical Specifications .......................................... 35 3 Device Configuration ................................. 18 5.1 RST and PORRST Timings ........................ 35 3.1 Reset/Abort Sources ............................... 18 5.2 PLL and Clock Specifications ...................... 40 3.2 Lockup Reset Module .............................. 19 5.3 SPIn Master Mode Timing Parameters ............. 47 3.3 ESM Assignments .................................. 19 5.4 SPIn Slave Mode Timing Parameters .............. 51 3.4 Interrupt Priority (M3VIM) ........................... 20 5.5 CAN Controller (DCANn) Mode Timings ........... 55 3.5 MibADC ............................................. 21 5.6 High-End Timer (HET) Timings ..................... 55 3.6 MibSPI .............................................. 22 5.7 Multi-Buffered A-to-D Converter (MibADC) ......... 56 3.7 JTAG ID ............................................ 23 6 Revision History ....................................... 60 3.8 Scan Chains ........................................ 23 7 Mechanical Data ....................................... 61 3.9 Low-Power Modes .................................. 23 7.1 Thermal Data ....................................... 61 3.10 Adaptive Impedance 4 mA IO Buffer ............... 23 7.2 Packaging Information .............................. 61 3.11 Built-In Self Test (BIST) Features .................. 28 Copyright © 2012, Texas Instruments Incorporated Contents 7 Submit Documentation Feedback Product Folder Link(s): TMS470MF06607 |
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