M95M02-DRMN6TP datasheet(40/41 Pages) STMICROELECTRONICS

40 / 41 page

Revision history

M95M02-DR

40/41

DocID18203 Rev 8

Revision history

Table 17. Document revision history

Date

Revision

Changes

15-Nov-2010

Initial release.

10-Dec-2010

Updated DC and AC characteristics according to characterization test

results.

10-Jan-2011

Updated ordering information.

10-May-2011

Updated Table 13: AC characteristics and related text, and Table 12: DC

characteristics.

19-Oct-2011

Changed datasheet status to full datasheet.

Modified Section 1: Description.

Added Figure 3: WLSCP connections (bump side view).

Updated Figure 4: Bus master and memory devices on the SPI bus and

Figure 7: Block diagram.

Modified Section 7: ECC (error correction code) and write cycling.

Updated Note 2 in Table 7: Absolute maximum ratings.

Added Table 8: Memory cell characteristics.

Updated Figure 24: M95M02-DR WLCSP package outline and Table 15:

M95M02-DR WLCSP package mechanical data.

Updated disclaimer on last page.

04-Oct-2012

Text and structure of document modified as per new M95xxx standard

EEPROM datasheet template.

Updated:

– Cycling: 4 million cycles

– Data retention: 200 years

Added:

– Standard WLCSP (CS)

19-Dec-2012

Updated Section 7.2: Initial delivery state.

Restored Figure 12, Figure 13 and Figure 14.

13-Mar-2013

Document reformatted.

Replaced “ball” by “bump” in the entire document.

Deleted Figure 3: Thin WLCSP connections (bump side view), Figure 24:

M95M02-DR thin WLCSP package (CT) outline, bump side view and

Table 15: M95M02-DR thin WLCSP package mechanical data.

Renamed Figure 24: M95M02-DRCS6TP/K, WLCSP standard package

outline, bump side view and Table 15: M95M02-DRCS6TP/K, WLCSP

package mechanical data

Updated package information in Table 16: Ordering information scheme.

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