M95M02-DRMN6TP datasheet(28/41 Pages) STMICROELECTRONICS

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Instructions

M95M02-DR

28/41

DocID18203 Rev 8

6.10

Lock ID

The Lock ID instruction permanently locks the Identification Page in read-only mode. Before

this instruction can be accepted, a Write Enable (WREN) instruction must have been

executed.

The Lock ID instruction is issued by driving Chip Select (S) low, sending the instruction

code, the address and a data byte on Serial Data Input (D), and driving Chip Select (S) high.

In the address sent, A10 must be equal to 1, all other address bits are Don't Care. The data

byte sent must be equal to the binary value xxxx xx1x, where x = Don't Care.

Chip Select (S) must be driven high after the rising edge of Serial Clock (C) that latches in

the eighth bit of the data byte, and before the next rising edge of Serial Clock (C).

Otherwise, the Lock ID instruction is not executed.

Driving Chip Select (S) high at a byte boundary of the input data triggers the self-timed write

cycle whose duration is tW (as specified in AC characteristics in Section 9: DC and AC

parameters). The instruction sequence is shown in Figure 18.

The instruction is discarded, and is not executed, under the following conditions:

•

If a Write cycle is already in progress,

•

If the Block Protect bits (BP1,BP0) = (1,1),

•

If a rising edge on Chip Select (S) happens outside of a byte boundary.

Figure 18. Lock ID sequence

MS30911V1

9 10

2829303132333435

22 21

36 37 38

High impedance

Instruction

24-bit address

765432

Data byte

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