M95M02-DRMN6TP datasheet(24/41 Pages) STMICROELECTRONICS

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Instructions

M95M02-DR

24/41

DocID18203 Rev 8

6.6.1

Cycling with Error Correction Code (ECC)

M95M02-D devices offer an Error Correction Code (ECC) logic. The ECC is an internal logic

function which is transparent for the SPI communication protocol.

The ECC logic is implemented on each group of four EEPROM bytes(c). Inside a group, if a

single bit out of the four bytes happens to be erroneous during a Read operation, the ECC

detects this bit and replaces it with the correct value. The read reliability is therefore much

improved.

Even if the ECC function is performed on groups of four bytes, a single byte can be

written/cycled independently. In this case, the ECC function also writes/cycles the three

other bytes located in the same group(c). As a consequence, the maximum cycling budget is

defined at group level and the cycling can be distributed over the four bytes of the group: the

sum of the cycles seen by byte0, byte1, byte2 and byte3 of the same group must remain

below the maximum value defined in Table 10.

Figure 14. Page Write (WRITE) sequence

MS30906V1

9 10

28 29 30 31 32 33 34 35

22 21

3210

36 37 38

Instruction

24-bit address

765432

Data byte 1

765432

Data byte 2

765432

Data byte 3

65432

Data byte N

c. A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where N is an integer.

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