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ST10F280 bảng dữ liệu(PDF) 211 Page - STMicroelectronics

tên linh kiện ST10F280
Giải thích chi tiết về linh kiện  16-bit MCU with MAC unit, 512 Kbyte Flash memory and 18 Kbyte RAM
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST10F280 bảng dữ liệu(HTML) 211 Page - STMicroelectronics

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ST10F280
Electrical characteristics
Doc ID 8673 Rev. 3
211/239
The mechanism used to generate the CPU clock is selected during reset by the logic levels
on pins P0.15-13 (P0H.7-5).
Figure 77.
Generation mechanisms for the CPU clock
20.4.3
Clock generation modes
The Table 45 associates the combinations of these three bit with the respective clock
generation mode.
Table 45.
CPU frequency generation
P0H.7 P0H.6
P0H.5
CPU frequency
fCPU = fXTAL x F
External clock input
range(1)
Notes
11
1
f
XTAL x 4
2.5 to 10MHz
Default configuration
11
0
f
XTAL x 3
3.33 to 13.33MHz
10
1
f
XTAL x 2
5 to 20MHz
10
0
f
XTAL x 5
2 to 8MHz
01
1
f
XTAL x 1
1 to 40MHz
Direct drive(2)(3)
01
0
f
XTAL x 10
1 to 4MHz
00
1
f
XTAL x 0.5
2 to 80MHz
CPU clock via
prescaler(4)
00
0
f
XTAL x 2.5
4 to 16MHz
1.
The external clock input range refers to a CPU clock range of 1...40MHz.
2.
The maximum depends on the duty cycle of the external clock signal.
3.
The PLL free-running frequency is from 2 to 10MHz.



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