STA381BWS datasheet(89/171 Pages) STMICROELECTRONICS

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STA381BWS

Doc ID 018937 Rev 6

89/171

6.28

Short-circuit protection mode registers SHOK (address 0x58)

The following power bridge pins short-circuit protections are implemented in the

STA381BWS:

●

OUTxx vs. GNDx

●

OUTxx vs. VCCx

●

OUT1B vs. OUT2A

The protection is enabled when reg. 0x50 bit 0 (SHEN) is set to ‘1’. The protection will check

the short-circuit when the EAPD bit is toggled from ‘0’ to ‘1’ (i.e. the power bridge is switched

on), and only if the test passes (no short), does the power bridge leave the tristate condition.

GNDSH equal to ‘0’ means that OUTxx is shorted to ground, while the same value on

VCCSH means that OUTxx is shorted to Vcc, finally OUTSH=’0’ means that OUT1B is

shorted to OUT2A.

To be noted that once the check is performed, and the tristate released, the short protection

is not active anymore until the next EAPD 0->1 toggling which means that shorts that

happened during normal operation cannot be detected.

To be noted that register SHOK is meaningful only after the EAPD bit is set to ‘1’ at least

once.

The short-circuit protections implemented are effective only in BTL configuration, and they

must not be activated if a single-ended application scheme is needed.

Table 84.

PLL register 0x57 bits

Bit

R/W

RST

Name

Description

R/W

BYPSTATE

PLL bypass state

R/W

PDSTATE

PLL PD state

R/W

OSCOK

OSCI locked

R/W

LOWCK

Clock input low-frequency check

reserved

GNDSH

VCCSH

OUTSH

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