HT16K33 datasheet(9/47 Pages) HOLTEK

9 / 47 page

Rev. 1.10

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Rev. 1.10

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HT16K33

RAM Mapping 16*8 LED Controller Driver with keyscan

D.C. Characteristics

VDD =4.5~5.5V; Ta=25°C (Unless otherwise specified)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

VDD

Conditions

VDD

Operating Voltage

—

4.5

5.5

IDD

Operating Current

No load� normal operation�

INT/ROW bit is set to “0”

—

�

ISTB

Standb� Current

No load� standb� mode

—

μA

VIH

Input high Voltage

SDA�SCL

0.7VDD

—

VDD

VIL

Input Low Voltage

SDA� SCL

—

0.3VDD

IIL

Input leakage current

—

VIN = VSS or VDD

-1

—

μA

RPL

Input pull-low resistor

ROW3/K1~ROW15/K13�

ROW0/A�~ROW�/A0 Ke�scan

during

�50

—

KΩ

IOL1

Low level output current

VOL=0.4V; SDA

�

—

IOL�

ROW Sink Current

VOL=0.4V� INT pin

�

—

IOH1

ROW Source Current

VOH=VDD-�V� (ROW0~ROW15 pin)

-�0

-�5

-40

VOH=VDD-3V� (ROW0~ROW15 pin )

-�5

-30

-50

Imath

ROW Source Current

tolerance

VOH=VDD-3V� (ROW0~ROW15 pin )

—

IOL3

CO� Sink Current

VOL=0.3V� (CO�0~CO�7 pin)

1�0

�00

—

IOH�

CO� Source Current

VOH=VDD-�V� (CO�0~CO�3 pin)

-�0

-�5

-40

A.C. Characteristics

VDD =4.5~5.5V; Ta=25°C (Unless otherwise specified)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VDD

Condition

tLED

LED Frame time

1/9 Dut�

7.�

9.5

11.4

tOFF

VDD OFF Time

—

VDD drop down to 0V

�0

—

tSR

VDD Slew Rate

—

0.05

—

V/ms

Note: 1. If the Power on Reset timing conditions are not satisfied in the power ON/OFF sequence, the internal

Power on Reset circuit will not operate normally.

2. If VDD drops below the minimum voltage of the operating voltage spec. during operating, the Power on

Reset timing conditions must also be satisfied. That is, VDD must drop to 0V and remain at 0V for 20ms (min.)

before rising to the normal operating voltage.

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