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MAC7200 bảng dữ liệu(PDF) 232 Page - Freescale Semiconductor, Inc |
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MAC7200 bảng dữ liệu(HTML) 232 Page - Freescale Semiconductor, Inc |
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232 / 976 page ![]() A7S Nexus3 Programmers Model MAC7200 Microcontroller Family Reference Manual, Rev. 2 154 Freescale Semiconductor Ownership Trace Register (OTR). The operating system writes the ID for the current task/process in the OTR. The UBA is read and written to by the external development tool. NOTE It is recommended that the UBA only be modified while system reset is asserted or in debug mode. Caution should be taken when modifying the UBA when system reset is negated. 11.10.3.5 Read/Write Access Control/Status (RWCS) The Read Write Access Control/Status Register provides control for Read/Write Access. Read/Write access provides DMA-like access to Advanced High-performance Bus (AHB) memory mapped resources when the processor is halted or during runtime. The RWCS Register also provides Read/Write Access Status information per Table 11-26. Offset see Table 11-21 Access: User read/write 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R OWNERSHIP TRACE REGISTER ADDRESS W Reset 000 00 000 00 000 00 0 15 14 13 12 11 10 9 876 54 321 0 R OWNERSHIP TRACE REGISTER ADDRESS W Reset 000 00 000 00 000 00 0 Figure 11-8. User Base Address Register (UBA) Offset see Table 11-21 Access: User read/write 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R AC RW SZ MAP PR 000 00 0 W Reset 000 00 000 00 000 00 0 15 14 13 12 11 10 9 876 54 321 0 R CNT ERR DV W Reset 000 00 000 00 000 00 0 Figure 11-9. Read/Write Access Control Register (RWCS) |
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