MAC7200 datasheet(208/976 Pages) FREESCALE

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Introduction

MAC7200 Microcontroller Family Reference Manual, Rev. 2

130

Freescale Semiconductor

11.1.1

A7S Nexus3 Overview

This specification defines the auxiliary pin functions, transfer protocols and standard development features

of a Class 3 device in compliance with the IEEE-ISTO Nexus 5001 standard. The development features

supported are Program Trace, Data Trace, Watchpoint Messaging, Breakpoints, Ownership Trace and

Read/Write Access via the JTAG interface. The A7S Nexus3 module also supports two Class 4 features:

Watchpoint Triggering, and processor overrun control.

11.1.2

Nexus Feature List

The A7S Nexus3 module is compliant with Class 3 of the IEEE-ISTO 5001 standard. The following

features are implemented:

•

Program Trace via Branch Trace Messaging (BTM). Branch trace messaging displays program

flow discontinuities (direct and indirect branches, exceptions, etc.), allowing the development tool

to interpolate what transpires between the discontinuities. Thus static code may be traced.

— Program Trace in ARM mode will use Branch/Predicate History Messaging due to the

conditional nature of 32-bit ARM instructions

— Program Trace in Thumb Mode can be programmed to use the Branch History Messaging

method, or use traditional Program Trace – Direct/Indirect Branch Messaging

•

Data Trace via Data Write Messaging (DWM) and Data Read Messaging (DRM). This provides

the capability for the development tool to trace reads and/or writes to (selected) internal memory

resources.

•

Ownership Trace via Ownership Trace Messaging (OTM). OTM facilitates ownership trace by

providing visibility of which process ID or operating system task is activated. An Ownership Trace

Message is transmitted when a new process/task is activated, allowing the development tool to

trace ownership flow.

•

Run-time access to the memory map via the JTAG port. This allows for enhanced download/upload

capabilities.

•

Watchpoint Messaging (WPM) via the auxiliary pins.

•

Breakpoint on instruction address.

•

Watchpoint Trigger enable of Program and/or Data Trace Messaging

•

Auxiliary interface for higher data input/output

— Configurable two (2) or eight (8) MDO (Message Data Out) pins

— One (1) or two (2) MSEO (Message Start/End Out) pins

— One (1) RDY (Read/Write Ready) pin

— One (1) EVTO (Watchpoint Event) pin

— One (1) EVTI (Event In) pin

— One (1) MCKO (Message Clock Out) pin

•

Registers for Program Trace, Ownership Trace, Watchpoint Trigger, and Read/Write Access.

•

Programmable processor stall function to mitigate message queue overrun risk.

•

All features controllable and configurable via the JTAG port

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