| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
H5GQ1H24AFR-R0C bảng dữ liệu(PDF) 44 Page - Hynix Semiconductor |
|
|
|||||||||||||||||||||||||||||
H5GQ1H24AFR-R0C bảng dữ liệu(HTML) 44 Page - Hynix Semiconductor |
|
44 / 173 page ![]() Rev. 1.0 /Nov. 2009 44 H5GQ1H24AFR WRITE Recovery (WR) The programmed WR value is used for the auto precharge feature along with tRP to determine tDAL. The WR register bits are not a required function and may be implemented at the discretion of the DRAM manufacturer. WR must be programmed with a value greater than or equal to RU{tWR/tCK}, where RU stands for round up, tWR is the analog value from the vendor datasheet and tCK is the operating clock cycle time. By default WR is specified by bits A8‐A11, defining a WR range of 4 to 19 tCK. Test Mode The normal operating mode is selected by issuing a MODE REGISTER SET command with bit A7 set to ’0’, and bits A0‐A6 and A8‐A11 set to the desired values. Programming bit A7 to ‘1’ places the device into a test mode that is only to be used by the DRAM manufacturer. No functional operation is specified with test mode enabled. |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |