ATmega1284P datasheet(138/380 Pages) ATMEL

138 / 380 page

138

8059D–AVR–11/09

ATmega1284P

ICF1 is automatically cleared when the Input Capture Interrupt Vector is executed. Alternatively,

ICF1 can be cleared by writing a logic one to its bit location.

• Bit 4:3 – Res: Reserved Bits

These bits are unused bits in the ATmega1284P, and will always read as zero.

• Bit 2 – OCF1B: Timer/Counter1, Output Compare B Match Flag

This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output

Compare Register B (OCR1B).

Note that a Forced Output Compare (FOC1B) strobe will not set the OCF1B Flag.

OCF1B is automatically cleared when the Output Compare Match B Interrupt Vector is exe-

cuted. Alternatively, OCF1B can be cleared by writing a logic one to its bit location.

• Bit 1 – OCF1A: Timer/Counter1, Output Compare A Match Flag

This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output

Compare Register A (OCR1A).

Note that a Forced Output Compare (FOC1A) strobe will not set the OCF1A Flag.

OCF1A is automatically cleared when the Output Compare Match A Interrupt Vector is exe-

cuted. Alternatively, OCF1A can be cleared by writing a logic one to its bit location.

• Bit 0 – TOV1: Timer/Counter1, Overflow Flag

The setting of this flag is dependent of the WGMn3:0 bits setting. In Normal and CTC modes,

the TOV1 Flag is set when the timer overflows. Refer to Table 14-5 on page 133 for the TOV1

Flag behavior when using another WGMn3:0 bit setting.

TOV1 is automatically cleared when the Timer/Counter1 Overflow Interrupt Vector is executed.

Alternatively, TOV1 can be cleared by writing a logic one to its bit location.

14.11.11 TIFR3 – Timer/Counter3 Interrupt Flag Register

• Bit 7:6 – Res: Reserved Bits

These bits are unused bits in the ATmega1284P, and will always read as zero.

• Bit 5 – ICF3: Timer/Counter3, Input Capture Flag

This flag is set when a capture event occurs on the ICP3 pin. When the Input Capture Register

(ICR1) is set by the WGMn3:0 to be used as the TOP value, the ICF3 Flag is set when the coun-

ter reaches the TOP value.

ICF3 is automatically cleared when the Input Capture Interrupt Vector is executed. Alternatively,

ICF3 can be cleared by writing a logic one to its bit location.

• Bit 4:3 – Res: Reserved Bits

These bits are unused bits in the ATmega1284P, and will always read as zero.

Bit

76543210

0x18 (0x38)

–

ICF3

–

OCF3B

OCF3A

TOV3

TIFR3

Read/Write

R/W

Initial Value

00000000

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