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PIC18F44J10 bảng dữ liệu(PDF) 75 Page - Microchip Technology |
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PIC18F44J10 bảng dữ liệu(HTML) 75 Page - Microchip Technology |
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75 / 368 page ![]() © 2009 Microchip Technology Inc. DS39682E-page 73 PIC18F45J10 FAMILY REGISTER 7-1: EECON1: EEPROM CONTROL REGISTER 1 U-0 U-0 U-0 R/W-0 R/W-x R/W-0 R/S-0 U-0 — — — FREE WRERR WREN WR — bit 7 bit 0 Legend: U = Unimplemented bit, read as ‘0’ R = Readable bit W = Writable bit S = Settable bit (cannot be cleared in software) -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-5 Unimplemented: Read as ‘0’ bit 4 FREE: Flash Row Erase Enable bit 1 = Performs an erase operation on the next WR command (cleared by completion of erase operation) 0 = Perform write only bit 3 WRERR: Flash Program Error Flag bit 1 = A write operation is prematurely terminated (any Reset during self-timed programming in normal operation, or an improper write attempt) 0 = The write operation completed bit 2 WREN: Flash Program Write Enable bit 1 = Allows write cycles to Flash program 0 = Inhibits write cycles to Flash program bit 1 WR: Write Control bit 1 = Initiates a program memory erase cycle or write cycle. (The operation is self-timed and the bit is cleared by hardware once write is complete. The WR bit can only be set (not cleared) in software.) 0 = Write cycle is complete bit 0 Unimplemented: Read as ‘0’ |
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